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RTL8822CS
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import rtl88x2CS_WiFi_linux_v5.7.3.2_35617.20191031_COEX20190531-0e0e driver

This commit is contained in:
chewitt 2020-10-30 06:13:59 +00:00
parent 6afc33c3c4
commit ad1391e219
638 changed files with 746437 additions and 0 deletions
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config RTL8822BS
tristate "Realtek 8822C SDIO WiFi"
---help---
Help message of RTL8822CS

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clean Normal file
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#!/bin/bash
rmmod 8192cu
rmmod 8192ce
rmmod 8192du
rmmod 8192de

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core/efuse/rtw_efuse.c Normal file
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core/mesh/rtw_mesh.c Executable file
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core/mesh/rtw_mesh.h Executable file
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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __RTW_MESH_H_
#define __RTW_MESH_H_
#ifndef CONFIG_AP_MODE
#error "CONFIG_RTW_MESH can't be enabled when CONFIG_AP_MODE is not defined\n"
#endif
#define RTW_MESH_TTL 31
#define RTW_MESH_PERR_MIN_INT 100
#define RTW_MESH_DEFAULT_ELEMENT_TTL 31
#define RTW_MESH_RANN_INTERVAL 5000
#define RTW_MESH_PATH_TO_ROOT_TIMEOUT 6000
#define RTW_MESH_DIAM_TRAVERSAL_TIME 50
#define RTW_MESH_PATH_TIMEOUT 5000
#define RTW_MESH_PREQ_MIN_INT 10
#define RTW_MESH_MAX_PREQ_RETRIES 4
#define RTW_MESH_MIN_DISCOVERY_TIMEOUT (2 * RTW_MESH_DIAM_TRAVERSAL_TIME)
#define RTW_MESH_ROOT_CONFIRMATION_INTERVAL 2000
#define RTW_MESH_PATH_REFRESH_TIME 1000
#define RTW_MESH_ROOT_INTERVAL 5000
#define RTW_MESH_SANE_METRIC_DELTA 100
#define RTW_MESH_MAX_ROOT_ADD_CHK_CNT 2
#define RTW_MESH_PLINK_UNKNOWN 0
#define RTW_MESH_PLINK_LISTEN 1
#define RTW_MESH_PLINK_OPN_SNT 2
#define RTW_MESH_PLINK_OPN_RCVD 3
#define RTW_MESH_PLINK_CNF_RCVD 4
#define RTW_MESH_PLINK_ESTAB 5
#define RTW_MESH_PLINK_HOLDING 6
#define RTW_MESH_PLINK_BLOCKED 7
extern const char *_rtw_mesh_plink_str[];
#define rtw_mesh_plink_str(s) ((s <= RTW_MESH_PLINK_BLOCKED) ? _rtw_mesh_plink_str[s] : _rtw_mesh_plink_str[RTW_MESH_PLINK_UNKNOWN])
#define RTW_MESH_PS_UNKNOWN 0
#define RTW_MESH_PS_ACTIVE 1
#define RTW_MESH_PS_LSLEEP 2
#define RTW_MESH_PS_DSLEEP 3
extern const char *_rtw_mesh_ps_str[];
#define rtw_mesh_ps_str(mps) ((mps <= RTW_MESH_PS_DSLEEP) ? _rtw_mesh_ps_str[mps] : _rtw_mesh_ps_str[RTW_MESH_PS_UNKNOWN])
#define GET_MESH_CONF_ELE_PATH_SEL_PROTO_ID(_iec) LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 0, 0, 8)
#define GET_MESH_CONF_ELE_PATH_SEL_METRIC_ID(_iec) LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 1, 0, 8)
#define GET_MESH_CONF_ELE_CONGEST_CTRL_MODE_ID(_iec) LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 2, 0, 8)
#define GET_MESH_CONF_ELE_SYNC_METHOD_ID(_iec) LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 3, 0, 8)
#define GET_MESH_CONF_ELE_AUTH_PROTO_ID(_iec) LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 4, 0, 8)
#define GET_MESH_CONF_ELE_MESH_FORMATION(_iec) LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 5, 0, 8)
#define GET_MESH_CONF_ELE_CTO_MGATE(_iec) LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 5, 0, 1)
#define GET_MESH_CONF_ELE_NUM_OF_PEERINGS(_iec) LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 5, 1, 6)
#define GET_MESH_CONF_ELE_CTO_AS(_iec) LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 5, 7, 1)
#define GET_MESH_CONF_ELE_MESH_CAP(_iec) LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 6, 0, 8)
#define GET_MESH_CONF_ELE_ACCEPT_PEERINGS(_iec) LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 6, 0, 1)
#define GET_MESH_CONF_ELE_MCCA_SUP(_iec) LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 6, 1, 1)
#define GET_MESH_CONF_ELE_MCCA_EN(_iec) LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 6, 2, 1)
#define GET_MESH_CONF_ELE_FORWARDING(_iec) LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 6, 3, 1)
#define GET_MESH_CONF_ELE_MBCA_EN(_iec) LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 6, 4, 1)
#define GET_MESH_CONF_ELE_TBTT_ADJ(_iec) LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 6, 5, 1)
#define GET_MESH_CONF_ELE_PS_LEVEL(_iec) LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 6, 6, 1)
#define SET_MESH_CONF_ELE_PATH_SEL_PROTO_ID(_iec, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_iec)) + 0, 0, 8, _val)
#define SET_MESH_CONF_ELE_PATH_SEL_METRIC_ID(_iec, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_iec)) + 1, 0, 8, _val)
#define SET_MESH_CONF_ELE_CONGEST_CTRL_MODE_ID(_iec, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_iec)) + 2, 0, 8, _val)
#define SET_MESH_CONF_ELE_SYNC_METHOD_ID(_iec, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_iec)) + 3, 0, 8, _val)
#define SET_MESH_CONF_ELE_AUTH_PROTO_ID(_iec, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_iec)) + 4, 0, 8, _val)
#define SET_MESH_CONF_ELE_CTO_MGATE(_iec, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_iec)) + 5, 0, 1, _val)
#define SET_MESH_CONF_ELE_NUM_OF_PEERINGS(_iec, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_iec)) + 5, 1, 6, _val)
#define SET_MESH_CONF_ELE_CTO_AS(_iec, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_iec)) + 5, 7, 1, _val)
#define SET_MESH_CONF_ELE_ACCEPT_PEERINGS(_iec, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_iec)) + 6, 0, 1, _val)
#define SET_MESH_CONF_ELE_MCCA_SUP(_iec, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_iec)) + 6, 1, 1, _val)
#define SET_MESH_CONF_ELE_MCCA_EN(_iec, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_iec)) + 6, 2, 1, _val)
#define SET_MESH_CONF_ELE_FORWARDING(_iec, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_iec)) + 6, 3, 1, _val)
#define SET_MESH_CONF_ELE_MBCA_EN(_iec, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_iec)) + 6, 4, 1, _val)
#define SET_MESH_CONF_ELE_TBTT_ADJ(_iec, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_iec)) + 6, 5, 1, _val)
#define SET_MESH_CONF_ELE_PS_LEVEL(_iec, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_iec)) + 6, 6, 1, _val)
/* Mesh flags */
#define MESH_FLAGS_AE 0x3 /* mask */
#define MESH_FLAGS_AE_A4 0x1
#define MESH_FLAGS_AE_A5_A6 0x2
/* Max number of paths */
#define RTW_MESH_MAX_PATHS 1024
#define RTW_PREQ_Q_F_START 0x1
#define RTW_PREQ_Q_F_REFRESH 0x2
#define RTW_PREQ_Q_F_CHK 0x4
#define RTW_PREQ_Q_F_PEER_AKA 0x8
#define RTW_PREQ_Q_F_BCAST_PREQ 0x10 /* force path_dicover using broadcast */
struct rtw_mesh_preq_queue {
_list list;
u8 dst[ETH_ALEN];
u8 flags;
};
extern const u8 ae_to_mesh_ctrl_len[];
enum mesh_frame_type {
MESH_UCAST_DATA = 0x0,
MESH_BMCAST_DATA = 0x1,
MESH_UCAST_PX_DATA = 0x2,
MESH_BMCAST_PX_DATA = 0x3,
MESH_MHOP_UCAST_ACT = 0x4,
MESH_MHOP_BMCAST_ACT = 0x5,
};
enum mpath_sel_frame_type {
MPATH_PREQ = 0,
MPATH_PREP,
MPATH_PERR,
MPATH_RANN
};
/**
* enum rtw_mesh_deferred_task_flags - mesh deferred tasks
*
*
*
* @RTW_MESH_WORK_HOUSEKEEPING: run the periodic mesh housekeeping tasks
* @RTW_MESH_WORK_ROOT: the mesh root station needs to send a frame
* @RTW_MESH_WORK_DRIFT_ADJUST: time to compensate for clock drift relative to other
* mesh nodes
* @RTW_MESH_WORK_MBSS_CHANGED: rebuild beacon and notify driver of BSS changes
*/
enum rtw_mesh_deferred_task_flags {
RTW_MESH_WORK_HOUSEKEEPING,
RTW_MESH_WORK_ROOT,
RTW_MESH_WORK_DRIFT_ADJUST,
RTW_MESH_WORK_MBSS_CHANGED,
};
#define RTW_MESH_MAX_PEER_CANDIDATES 15 /* aid consideration */
#define RTW_MESH_MAX_PEER_LINKS 8
#define RTW_MESH_PEER_LINK_TIMEOUT 20
#define RTW_MESH_PEER_CONF_DISABLED 0 /* special time value means no confirmation ongoing */
#if CONFIG_RTW_MESH_PEER_BLACKLIST
#define IS_PEER_CONF_DISABLED(plink) ((plink)->peer_conf_end_time == RTW_MESH_PEER_CONF_DISABLED)
#define IS_PEER_CONF_TIMEOUT(plink)(!IS_PEER_CONF_DISABLED(plink) && rtw_time_after(rtw_get_current_time(), (plink)->peer_conf_end_time))
#define SET_PEER_CONF_DISABLED(plink) (plink)->peer_conf_end_time = RTW_MESH_PEER_CONF_DISABLED
#define SET_PEER_CONF_END_TIME(plink, timeout_ms) \
do { \
(plink)->peer_conf_end_time = rtw_get_current_time() + rtw_ms_to_systime(timeout_ms); \
if ((plink)->peer_conf_end_time == RTW_MESH_PEER_CONF_DISABLED) \
(plink)->peer_conf_end_time++; \
} while (0)
#else
#define IS_PEER_CONF_DISABLED(plink) 1
#define IS_PEER_CONF_TIMEOUT(plink) 0
#define SET_PEER_CONF_DISABLED(plink) do {} while (0)
#define SET_PEER_CONF_END_TIME(plink, timeout_ms) do {} while (0)
#endif /* CONFIG_RTW_MESH_PEER_BLACKLIST */
#define RTW_MESH_CTO_MGATE_CONF_DISABLED 0 /* special time value means no confirmation ongoing */
#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST
#define IS_CTO_MGATE_CONF_DISABLED(plink) ((plink)->cto_mgate_conf_end_time == RTW_MESH_CTO_MGATE_CONF_DISABLED)
#define IS_CTO_MGATE_CONF_TIMEOUT(plink)(!IS_CTO_MGATE_CONF_DISABLED(plink) && rtw_time_after(rtw_get_current_time(), (plink)->cto_mgate_conf_end_time))
#define SET_CTO_MGATE_CONF_DISABLED(plink) (plink)->cto_mgate_conf_end_time = RTW_MESH_CTO_MGATE_CONF_DISABLED
#define SET_CTO_MGATE_CONF_END_TIME(plink, timeout_ms) \
do { \
(plink)->cto_mgate_conf_end_time = rtw_get_current_time() + rtw_ms_to_systime(timeout_ms); \
if ((plink)->cto_mgate_conf_end_time == RTW_MESH_CTO_MGATE_CONF_DISABLED) \
(plink)->cto_mgate_conf_end_time++; \
} while (0)
#else
#define IS_CTO_MGATE_CONF_DISABLED(plink) 1
#define IS_CTO_MGATE_CONF_TIMEOUT(plink) 0
#define SET_CTO_MGATE_CONF_DISABLED(plink) do {} while (0)
#define SET_CTO_MGATE_CONF_END_TIME(plink, timeout_ms) do {} while (0)
#endif /* CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST */
struct mesh_plink_ent {
u8 valid;
u8 addr[ETH_ALEN];
u8 plink_state;
#ifdef CONFIG_RTW_MESH_AEK
u8 aek_valid;
u8 aek[32];
#endif
u16 llid;
u16 plid;
#ifndef CONFIG_RTW_MESH_DRIVER_AID
u16 aid; /* aid assigned from upper layer */
#endif
u16 peer_aid; /* aid assigned from peer */
u8 chosen_pmk[16];
#ifdef CONFIG_RTW_MESH_AEK
u8 sel_pcs[4];
u8 l_nonce[32];
u8 p_nonce[32];
#endif
#ifdef CONFIG_RTW_MESH_DRIVER_AID
u8 *tx_conf_ies;
u16 tx_conf_ies_len;
#endif
u8 *rx_conf_ies;
u16 rx_conf_ies_len;
struct wlan_network *scanned;
#if CONFIG_RTW_MESH_PEER_BLACKLIST
systime peer_conf_end_time;
#endif
#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST
systime cto_mgate_conf_end_time;
#endif
};
#ifdef CONFIG_RTW_MESH_AEK
#define MESH_PLINK_AEK_VALID(ent) ent->aek_valid
#else
#define MESH_PLINK_AEK_VALID(ent) 0
#endif
struct mesh_plink_pool {
_lock lock;
u8 num; /* current ent being used */
struct mesh_plink_ent ent[RTW_MESH_MAX_PEER_CANDIDATES];
#if CONFIG_RTW_MESH_ACNODE_PREVENT
u8 acnode_rsvd;
#endif
#if CONFIG_RTW_MESH_PEER_BLACKLIST
_queue peer_blacklist;
#endif
#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST
_queue cto_mgate_blacklist;
#endif
};
struct mesh_peer_sel_policy {
u32 scanr_exp_ms;
#if CONFIG_RTW_MESH_ACNODE_PREVENT
u8 acnode_prevent;
u32 acnode_conf_timeout_ms;
u32 acnode_notify_timeout_ms;
#endif
#if CONFIG_RTW_MESH_OFFCH_CAND
u8 offch_cand;
u32 offch_find_int_ms; /* 0 means no offch find triggerred by driver self*/
#endif
#if CONFIG_RTW_MESH_PEER_BLACKLIST
u32 peer_conf_timeout_ms;
u32 peer_blacklist_timeout_ms;
#endif
#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST
u8 cto_mgate_require;
u32 cto_mgate_conf_timeout_ms;
u32 cto_mgate_blacklist_timeout_ms;
#endif
};
/* b2u flags */
#define RTW_MESH_B2U_ALL BIT0
#define RTW_MESH_B2U_GA_UCAST BIT1 /* Group addressed unicast frame, forward only */
#define RTW_MESH_B2U_BCAST BIT2
#define RTW_MESH_B2U_IP_MCAST BIT3
#define rtw_msrc_b2u_policy_chk(flags, mda) ( \
(flags & RTW_MESH_B2U_ALL) \
|| ((flags & RTW_MESH_B2U_BCAST) && is_broadcast_mac_addr(mda)) \
|| ((flags & RTW_MESH_B2U_IP_MCAST) && (IP_MCAST_MAC(mda) || ICMPV6_MCAST_MAC(mda))) \
)
#define rtw_mfwd_b2u_policy_chk(flags, mda, ucst) ( \
(flags & RTW_MESH_B2U_ALL) \
|| ((flags & RTW_MESH_B2U_GA_UCAST) && ucst) \
|| ((flags & RTW_MESH_B2U_BCAST) && is_broadcast_mac_addr(mda)) \
|| ((flags & RTW_MESH_B2U_IP_MCAST) && (IP_MCAST_MAC(mda) || ICMPV6_MCAST_MAC(mda))) \
)
/**
* @sane_metric_delta: Controlling if trigger additional path check mechanism
* @max_root_add_chk_cnt: The retry cnt to send additional root confirmation
* PREQ through old(last) path
*/
struct rtw_mesh_cfg {
u8 max_peer_links; /* peering limit */
u32 plink_timeout; /* seconds */
u8 dot11MeshTTL;
u8 element_ttl;
u32 path_refresh_time;
u16 dot11MeshHWMPpreqMinInterval;
u16 dot11MeshHWMPnetDiameterTraversalTime;
u32 dot11MeshHWMPactivePathTimeout;
u8 dot11MeshHWMPmaxPREQretries;
u16 min_discovery_timeout;
u16 dot11MeshHWMPconfirmationInterval;
u16 dot11MeshHWMPperrMinInterval;
u8 dot11MeshHWMPRootMode;
BOOLEAN dot11MeshForwarding;
s32 rssi_threshold; /* in dBm, 0: no specified */
u16 dot11MeshHWMPRannInterval;
BOOLEAN dot11MeshGateAnnouncementProtocol;
u32 dot11MeshHWMPactivePathToRootTimeout;
u16 dot11MeshHWMProotInterval;
u8 path_gate_timeout_factor;
#ifdef CONFIG_RTW_MESH_ADD_ROOT_CHK
u16 sane_metric_delta;
u8 max_root_add_chk_cnt;
#endif
struct mesh_peer_sel_policy peer_sel_policy;
#if CONFIG_RTW_MESH_DATA_BMC_TO_UC
u8 b2u_flags_msrc;
u8 b2u_flags_mfwd;
#endif
};
struct rtw_mesh_stats {
u32 fwded_mcast; /* Mesh forwarded multicast frames */
u32 fwded_unicast; /* Mesh forwarded unicast frames */
u32 fwded_frames; /* Mesh total forwarded frames */
u32 dropped_frames_ttl; /* Not transmitted since mesh_ttl == 0*/
u32 dropped_frames_no_route; /* Not transmitted, no route found */
u32 dropped_frames_congestion;/* Not forwarded due to congestion */
u32 dropped_frames_duplicate;
u32 mrc_del_qlen; /* MRC entry deleted cause by queue length limit */
};
struct rtw_mrc;
struct rtw_mesh_info {
u8 mesh_id[NDIS_802_11_LENGTH_SSID];
size_t mesh_id_len;
/* Active Path Selection Protocol Identifier */
u8 mesh_pp_id;
/* Active Path Selection Metric Identifier */
u8 mesh_pm_id;
/* Congestion Control Mode Identifier */
u8 mesh_cc_id;
/* Synchronization Protocol Identifier */
u8 mesh_sp_id;
/* Authentication Protocol Identifier */
u8 mesh_auth_id;
struct mesh_plink_pool plink_ctl;
u32 mesh_seqnum;
/* MSTA's own hwmp sequence number */
u32 sn;
systime last_preq;
systime last_sn_update;
systime next_perr;
/* Last used Path Discovery ID */
u32 preq_id;
ATOMIC_T mpaths;
struct rtw_mesh_table *mesh_paths;
struct rtw_mesh_table *mpp_paths;
int mesh_paths_generation;
int mpp_paths_generation;
int num_gates;
struct rtw_mesh_path *max_addr_gate;
bool max_addr_gate_is_larger_than_self;
struct rtw_mesh_stats mshstats;
_queue mpath_tx_queue;
u32 mpath_tx_queue_len;
_tasklet mpath_tx_tasklet;
struct rtw_mrc *mrc;
_lock mesh_preq_queue_lock;
struct rtw_mesh_preq_queue preq_queue;
int preq_queue_len;
};
extern const char *_action_self_protected_str[];
#define action_self_protected_str(action) ((action < RTW_ACT_SELF_PROTECTED_NUM) ? _action_self_protected_str[action] : _action_self_protected_str[0])
u8 *rtw_set_ie_mesh_id(u8 *buf, u32 *buf_len, const char *mesh_id, u8 id_len);
u8 *rtw_set_ie_mesh_config(u8 *buf, u32 *buf_len
, u8 path_sel_proto, u8 path_sel_metric, u8 congest_ctl_mode, u8 sync_method, u8 auth_proto
, u8 num_of_peerings, bool cto_mgate, bool cto_as
, bool accept_peerings, bool mcca_sup, bool mcca_en, bool forwarding
, bool mbca_en, bool tbtt_adj, bool ps_level);
int rtw_bss_is_same_mbss(WLAN_BSSID_EX *a, WLAN_BSSID_EX *b);
int rtw_bss_is_candidate_mesh_peer(WLAN_BSSID_EX *self, WLAN_BSSID_EX *target, u8 ch, u8 add_peer);
void rtw_chk_candidate_peer_notify(_adapter *adapter, struct wlan_network *scanned);
void rtw_mesh_peer_status_chk(_adapter *adapter);
#if CONFIG_RTW_MESH_ACNODE_PREVENT
void rtw_mesh_update_scanned_acnode_status(_adapter *adapter, struct wlan_network *scanned);
bool rtw_mesh_scanned_is_acnode_confirmed(_adapter *adapter, struct wlan_network *scanned);
bool rtw_mesh_acnode_prevent_allow_sacrifice(_adapter *adapter);
struct sta_info *rtw_mesh_acnode_prevent_pick_sacrifice(_adapter *adapter);
void dump_mesh_acnode_prevent_settings(void *sel, _adapter *adapter);
#endif
#if CONFIG_RTW_MESH_OFFCH_CAND
u8 rtw_mesh_offch_candidate_accepted(_adapter *adapter);
u8 rtw_mesh_select_operating_ch(_adapter *adapter);
void dump_mesh_offch_cand_settings(void *sel, _adapter *adapter);
#endif
#if CONFIG_RTW_MESH_PEER_BLACKLIST
int rtw_mesh_peer_blacklist_add(_adapter *adapter, const u8 *addr);
int rtw_mesh_peer_blacklist_del(_adapter *adapter, const u8 *addr);
int rtw_mesh_peer_blacklist_search(_adapter *adapter, const u8 *addr);
void rtw_mesh_peer_blacklist_flush(_adapter *adapter);
void dump_mesh_peer_blacklist(void *sel, _adapter *adapter);
void dump_mesh_peer_blacklist_settings(void *sel, _adapter *adapter);
#endif
#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST
u8 rtw_mesh_cto_mgate_required(_adapter *adapter);
u8 rtw_mesh_cto_mgate_network_filter(_adapter *adapter, struct wlan_network *scanned);
int rtw_mesh_cto_mgate_blacklist_add(_adapter *adapter, const u8 *addr);
int rtw_mesh_cto_mgate_blacklist_del(_adapter *adapter, const u8 *addr);
int rtw_mesh_cto_mgate_blacklist_search(_adapter *adapter, const u8 *addr);
void rtw_mesh_cto_mgate_blacklist_flush(_adapter *adapter);
void dump_mesh_cto_mgate_blacklist(void *sel, _adapter *adapter);
void dump_mesh_cto_mgate_blacklist_settings(void *sel, _adapter *adapter);
#endif
void dump_mesh_peer_sel_policy(void *sel, _adapter *adapter);
void dump_mesh_networks(void *sel, _adapter *adapter);
void rtw_mesh_adjust_chbw(u8 req_ch, u8 *req_bw, u8 *req_offset);
void rtw_mesh_sae_check_frames(_adapter *adapter, const u8 *buf, u32 len, u8 tx, u16 alg, u16 seq, u16 status);
int rtw_mesh_check_frames_tx(_adapter *adapter, const u8 **buf, size_t *len);
int rtw_mesh_check_frames_rx(_adapter *adapter, const u8 *buf, size_t len);
int rtw_mesh_on_auth(_adapter *adapter, union recv_frame *rframe);
unsigned int on_action_self_protected(_adapter *adapter, union recv_frame *rframe);
bool rtw_mesh_update_bss_peering_status(_adapter *adapter, WLAN_BSSID_EX *bss);
bool rtw_mesh_update_bss_formation_info(_adapter *adapter, WLAN_BSSID_EX *bss);
bool rtw_mesh_update_bss_forwarding_state(_adapter *adapter, WLAN_BSSID_EX *bss);
struct mesh_plink_ent *_rtw_mesh_plink_get(_adapter *adapter, const u8 *hwaddr);
struct mesh_plink_ent *rtw_mesh_plink_get(_adapter *adapter, const u8 *hwaddr);
struct mesh_plink_ent *rtw_mesh_plink_get_no_estab_by_idx(_adapter *adapter, u8 idx);
int _rtw_mesh_plink_add(_adapter *adapter, const u8 *hwaddr);
int rtw_mesh_plink_add(_adapter *adapter, const u8 *hwaddr);
int rtw_mesh_plink_set_state(_adapter *adapter, const u8 *hwaddr, u8 state);
#ifdef CONFIG_RTW_MESH_AEK
int rtw_mesh_plink_set_aek(_adapter *adapter, const u8 *hwaddr, const u8 *aek);
#endif
#if CONFIG_RTW_MESH_PEER_BLACKLIST
int rtw_mesh_plink_set_peer_conf_timeout(_adapter *adapter, const u8 *hwaddr);
#endif
void _rtw_mesh_plink_del_ent(_adapter *adapter, struct mesh_plink_ent *ent);
int rtw_mesh_plink_del(_adapter *adapter, const u8 *hwaddr);
void rtw_mesh_plink_ctl_init(_adapter *adapter);
void rtw_mesh_plink_ctl_deinit(_adapter *adapter);
void dump_mesh_plink_ctl(void *sel, _adapter *adapter);
int rtw_mesh_peer_establish(_adapter *adapter, struct mesh_plink_ent *plink, struct sta_info *sta);
void _rtw_mesh_expire_peer_ent(_adapter *adapter, struct mesh_plink_ent *plink);
void rtw_mesh_expire_peer(_adapter *adapter, const u8 *peer_addr);
u8 rtw_mesh_ps_annc(_adapter *adapter, u8 ps);
unsigned int on_action_mesh(_adapter *adapter, union recv_frame *rframe);
void rtw_mesh_cfg_init(_adapter *adapter);
void rtw_mesh_cfg_init_max_peer_links(_adapter *adapter, u8 stack_conf);
void rtw_mesh_cfg_init_plink_timeout(_adapter *adapter, u32 stack_conf);
void rtw_mesh_init_mesh_info(_adapter *adapter);
void rtw_mesh_deinit_mesh_info(_adapter *adapter);
#if CONFIG_RTW_MESH_DATA_BMC_TO_UC
void dump_mesh_b2u_flags(void *sel, _adapter *adapter);
#endif
int rtw_mesh_addr_resolve(_adapter *adapter, struct xmit_frame *xframe, _pkt *pkt, _list *b2u_list);
s8 rtw_mesh_tx_set_whdr_mctrl_len(u8 mesh_frame_mode, struct pkt_attrib *attrib);
void rtw_mesh_tx_build_mctrl(_adapter *adapter, struct pkt_attrib *attrib, u8 *buf);
u8 rtw_mesh_tx_build_whdr(_adapter *adapter, struct pkt_attrib *attrib
, u16 *fctrl, struct rtw_ieee80211_hdr *whdr);
int rtw_mesh_rx_data_validate_hdr(_adapter *adapter, union recv_frame *rframe, struct sta_info **sta);
int rtw_mesh_rx_data_validate_mctrl(_adapter *adapter, union recv_frame *rframe
, const struct rtw_ieee80211s_hdr *mctrl, const u8 *mda, const u8 *msa
, u8 *mctrl_len, const u8 **da, const u8 **sa);
int rtw_mesh_rx_validate_mctrl_non_amsdu(_adapter *adapter, union recv_frame *rframe);
int rtw_mesh_rx_msdu_act_check(union recv_frame *rframe
, const u8 *mda, const u8 *msa
, const u8 *da, const u8 *sa
, struct rtw_ieee80211s_hdr *mctrl
, struct xmit_frame **fwd_frame, _list *b2u_list);
void dump_mesh_stats(void *sel, _adapter *adapter);
#if defined(PLATFORM_LINUX) && (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 32))
#define rtw_lockdep_assert_held(l) lockdep_assert_held(l)
#define rtw_lockdep_is_held(l) lockdep_is_held(l)
#else
#error "TBD\n"
#endif
#include "rtw_mesh_pathtbl.h"
#include "rtw_mesh_hwmp.h"
#endif /* __RTW_MESH_H_ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __RTW_MESH_HWMP_H_
#define __RTW_MESH_HWMP_H_
#ifndef DBG_RTW_HWMP
#define DBG_RTW_HWMP 0
#endif
#if DBG_RTW_HWMP
#define RTW_HWMP_DBG(fmt, arg...) RTW_PRINT(fmt, ##arg)
#else
#define RTW_HWMP_DBG(fmt, arg...) RTW_DBG(fmt, ##arg)
#endif
#ifndef INFO_RTW_HWMP
#define INFO_RTW_HWMP 0
#endif
#if INFO_RTW_HWMP
#define RTW_HWMP_INFO(fmt, arg...) RTW_PRINT(fmt, ##arg)
#else
#define RTW_HWMP_INFO(fmt, arg...) RTW_INFO(fmt, ##arg)
#endif
void rtw_ewma_err_rate_init(struct rtw_ewma_err_rate *e);
unsigned long rtw_ewma_err_rate_read(struct rtw_ewma_err_rate *e);
void rtw_ewma_err_rate_add(struct rtw_ewma_err_rate *e, unsigned long val);
int rtw_mesh_path_error_tx(_adapter *adapter,
u8 ttl, const u8 *target, u32 target_sn,
u16 target_rcode, const u8 *ra);
void rtw_ieee80211s_update_metric(_adapter *adapter, u8 mac_id,
u8 per, u8 rate,
u8 bw, u8 total_pkt);
void rtw_mesh_rx_path_sel_frame(_adapter *adapter, union recv_frame *rframe);
void rtw_mesh_queue_preq(struct rtw_mesh_path *mpath, u8 flags);
void rtw_mesh_path_start_discovery(_adapter *adapter);
void rtw_mesh_path_timer(void *ctx);
void rtw_mesh_path_tx_root_frame(_adapter *adapter);
void rtw_mesh_work_hdl(_workitem *work);
void rtw_ieee80211_mesh_path_timer(void *ctx);
void rtw_ieee80211_mesh_path_root_timer(void *ctx);
BOOLEAN rtw_ieee80211_mesh_root_setup(_adapter *adapter);
void rtw_mesh_work(_workitem *work);
void rtw_mesh_atlm_param_req_timer(void *ctx);
#endif /* __RTW_MESH_HWMP_H_ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __RTW_MESH_PATHTBL_H_
#define __RTW_MESH_PATHTBL_H_
#ifndef DBG_RTW_MPATH
#define DBG_RTW_MPATH 1
#endif
#if DBG_RTW_MPATH
#define RTW_MPATH_DBG(fmt, arg...) RTW_PRINT(fmt, ##arg)
#else
#define RTW_MPATH_DBG(fmt, arg...) do {} while (0)
#endif
/**
* enum rtw_mesh_path_flags - mesh path flags
*
* @RTW_MESH_PATH_ACTIVE: the mesh path can be used for forwarding
* @RTW_MESH_PATH_RESOLVING: the discovery process is running for this mesh path
* @RTW_MESH_PATH_SN_VALID: the mesh path contains a valid destination sequence
* number
* @RTW_MESH_PATH_FIXED: the mesh path has been manually set and should not be
* modified
* @RTW_MESH_PATH_RESOLVED: the mesh path can has been resolved
* @RTW_MESH_PATH_REQ_QUEUED: there is an unsent path request for this destination
* already queued up, waiting for the discovery process to start.
* @RTW_MESH_PATH_DELETED: the mesh path has been deleted and should no longer
* be used
* @RTW_MESH_PATH_ROOT_ADD_CHK: root additional check in root mode.
* With this flag, It will try the last used rann_snd_addr
* @RTW_MESH_PATH_PEER_AKA: only used toward a peer, only used in active keep
* alive mechanism. PREQ's da = path dst
* @RTW_MESH_PATH_BCAST_PREQ: for re-checking next hop resolve toward root.
* Use it to force path_discover sending broadcast PREQ for root.
*
* RTW_MESH_PATH_RESOLVED is used by the mesh path timer to
* decide when to stop or cancel the mesh path discovery.
*/
enum rtw_mesh_path_flags {
RTW_MESH_PATH_ACTIVE = BIT(0),
RTW_MESH_PATH_RESOLVING = BIT(1),
RTW_MESH_PATH_SN_VALID = BIT(2),
RTW_MESH_PATH_FIXED = BIT(3),
RTW_MESH_PATH_RESOLVED = BIT(4),
RTW_MESH_PATH_REQ_QUEUED = BIT(5),
RTW_MESH_PATH_DELETED = BIT(6),
RTW_MESH_PATH_ROOT_ADD_CHK = BIT(7),
RTW_MESH_PATH_PEER_AKA = BIT(8),
RTW_MESH_PATH_BCAST_PREQ = BIT(9),
};
/**
* struct rtw_mesh_path - mesh path structure
*
* @dst: mesh path destination mac address
* @mpp: mesh proxy mac address
* @rhash: rhashtable list pointer
* @gate_list: list pointer for known gates list
* @sdata: mesh subif
* @next_hop: mesh neighbor to which frames for this destination will be
* forwarded
* @timer: mesh path discovery timer
* @frame_queue: pending queue for frames sent to this destination while the
* path is unresolved
* @rcu: rcu head for freeing mesh path
* @sn: target sequence number
* @metric: current metric to this destination
* @hop_count: hops to destination
* @exp_time: in jiffies, when the path will expire or when it expired
* @discovery_timeout: timeout (lapse in jiffies) used for the last discovery
* retry
* @discovery_retries: number of discovery retries
* @flags: mesh path flags, as specified on &enum rtw_mesh_path_flags
* @state_lock: mesh path state lock used to protect changes to the
* mpath itself. No need to take this lock when adding or removing
* an mpath to a hash bucket on a path table.
* @rann_snd_addr: the RANN sender address
* @rann_metric: the aggregated path metric towards the root node
* @last_preq_to_root: Timestamp of last PREQ sent to root
* @is_root: the destination station of this path is a root node
* @is_gate: the destination station of this path is a mesh gate
*
*
* The dst address is unique in the mesh path table. Since the mesh_path is
* protected by RCU, deleting the next_hop STA must remove / substitute the
* mesh_path structure and wait until that is no longer reachable before
* destroying the STA completely.
*/
struct rtw_mesh_path {
u8 dst[ETH_ALEN];
u8 mpp[ETH_ALEN]; /* used for MPP or MAP */
rtw_rhash_head rhash;
rtw_hlist_node gate_list;
_adapter *adapter;
struct sta_info __rcu *next_hop;
_timer timer;
_queue frame_queue;
u32 frame_queue_len;
rtw_rcu_head rcu;
u32 sn;
u32 metric;
u8 hop_count;
systime exp_time;
systime discovery_timeout;
systime gate_timeout;
u32 gate_ann_int; /* gate announce interval */
u8 discovery_retries;
enum rtw_mesh_path_flags flags;
_lock state_lock;
u8 rann_snd_addr[ETH_ALEN];
#ifdef CONFIG_RTW_MESH_ADD_ROOT_CHK
u8 add_chk_rann_snd_addr[ETH_ALEN];
#endif
u32 rann_metric;
unsigned long last_preq_to_root;
bool is_root;
bool is_gate;
bool gate_asked;
};
/**
* struct rtw_mesh_table
*
* @known_gates: list of known mesh gates and their mpaths by the station. The
* gate's mpath may or may not be resolved and active.
* @gates_lock: protects updates to known_gates
* @rhead: the rhashtable containing struct mesh_paths, keyed by dest addr
* @entries: number of entries in the table
*/
struct rtw_mesh_table {
rtw_hlist_head known_gates;
_lock gates_lock;
rtw_rhashtable rhead;
ATOMIC_T entries;
};
#define RTW_MESH_PATH_EXPIRE (600 * HZ)
/* Maximum number of paths per interface */
#define RTW_MESH_MAX_MPATHS 1024
/* Number of frames buffered per destination for unresolved destinations */
#define RTW_MESH_FRAME_QUEUE_LEN 10
int rtw_mesh_nexthop_lookup(_adapter *adapter,
const u8 *mda, const u8 *msa, u8 *ra);
int rtw_mesh_nexthop_resolve(_adapter *adapter,
struct xmit_frame *xframe);
struct rtw_mesh_path *rtw_mesh_path_lookup(_adapter *adapter,
const u8 *dst);
struct rtw_mesh_path *rtw_mpp_path_lookup(_adapter *adapter,
const u8 *dst);
int rtw_mpp_path_add(_adapter *adapter,
const u8 *dst, const u8 *mpp);
void dump_mpp(void *sel, _adapter *adapter);
struct rtw_mesh_path *
rtw_mesh_path_lookup_by_idx(_adapter *adapter, int idx);
void dump_mpath(void *sel, _adapter *adapter);
struct rtw_mesh_path *
rtw_mpp_path_lookup_by_idx(_adapter *adapter, int idx);
void rtw_mesh_path_fix_nexthop(struct rtw_mesh_path *mpath, struct sta_info *next_hop);
void rtw_mesh_path_expire(_adapter *adapter);
struct rtw_mesh_path *
rtw_mesh_path_add(_adapter *adapter, const u8 *dst);
int rtw_mesh_path_add_gate(struct rtw_mesh_path *mpath);
void rtw_mesh_gate_del(struct rtw_mesh_table *tbl, struct rtw_mesh_path *mpath);
bool rtw_mesh_gate_search(struct rtw_mesh_table *tbl, const u8 *addr);
int rtw_mesh_path_send_to_gates(struct rtw_mesh_path *mpath);
int rtw_mesh_gate_num(_adapter *adapter);
bool rtw_mesh_is_primary_gate(_adapter *adapter);
void dump_known_gates(void *sel, _adapter *adapter);
void rtw_mesh_plink_broken(struct sta_info *sta);
void rtw_mesh_path_assign_nexthop(struct rtw_mesh_path *mpath, struct sta_info *sta);
void rtw_mesh_path_flush_pending(struct rtw_mesh_path *mpath);
void rtw_mesh_path_tx_pending(struct rtw_mesh_path *mpath);
int rtw_mesh_pathtbl_init(_adapter *adapter);
void rtw_mesh_pathtbl_unregister(_adapter *adapter);
int rtw_mesh_path_del(_adapter *adapter, const u8 *addr);
void rtw_mesh_path_flush_by_nexthop(struct sta_info *sta);
void rtw_mesh_path_discard_frame(_adapter *adapter,
struct xmit_frame *xframe);
static inline void rtw_mesh_path_activate(struct rtw_mesh_path *mpath)
{
mpath->flags |= RTW_MESH_PATH_ACTIVE | RTW_MESH_PATH_RESOLVED;
}
void rtw_mesh_path_flush_by_iface(_adapter *adapter);
#endif /* __RTW_MESH_PATHTBL_H_ */

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/******************************************************************************
*
* Copyright(c) 2013 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#include <drv_types.h>
#include <hal_btcoex_wifionly.h>
#include <hal_data.h>
void rtw_btcoex_wifionly_switchband_notify(PADAPTER padapter)
{
hal_btcoex_wifionly_switchband_notify(padapter);
}
void rtw_btcoex_wifionly_scan_notify(PADAPTER padapter)
{
hal_btcoex_wifionly_scan_notify(padapter);
}
void rtw_btcoex_wifionly_connect_notify(PADAPTER padapter)
{
hal_btcoex_wifionly_connect_notify(padapter);
}
void rtw_btcoex_wifionly_hw_config(PADAPTER padapter)
{
hal_btcoex_wifionly_hw_config(padapter);
}
void rtw_btcoex_wifionly_initialize(PADAPTER padapter)
{
hal_btcoex_wifionly_initlizevariables(padapter);
}
void rtw_btcoex_wifionly_AntInfoSetting(PADAPTER padapter)
{
hal_btcoex_wifionly_AntInfoSetting(padapter);
}

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/******************************************************************************
*
* Copyright(c) 2007 - 2018 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __RTW_CHPLAN_H__
#define __RTW_CHPLAN_H__
enum rtw_chplan_id {
/* ===== 0x00 ~ 0x1F, legacy channel plan ===== */
RTW_CHPLAN_FCC = 0x00,
RTW_CHPLAN_IC = 0x01,
RTW_CHPLAN_ETSI = 0x02,
RTW_CHPLAN_SPAIN = 0x03,
RTW_CHPLAN_FRANCE = 0x04,
RTW_CHPLAN_MKK = 0x05,
RTW_CHPLAN_MKK1 = 0x06,
RTW_CHPLAN_ISRAEL = 0x07,
RTW_CHPLAN_TELEC = 0x08,
RTW_CHPLAN_GLOBAL_DOAMIN = 0x09,
RTW_CHPLAN_WORLD_WIDE_13 = 0x0A,
RTW_CHPLAN_TAIWAN = 0x0B,
RTW_CHPLAN_CHINA = 0x0C,
RTW_CHPLAN_SINGAPORE_INDIA_MEXICO = 0x0D,
RTW_CHPLAN_KOREA = 0x0E,
RTW_CHPLAN_TURKEY = 0x0F,
RTW_CHPLAN_JAPAN = 0x10,
RTW_CHPLAN_FCC_NO_DFS = 0x11,
RTW_CHPLAN_JAPAN_NO_DFS = 0x12,
RTW_CHPLAN_WORLD_WIDE_5G = 0x13,
RTW_CHPLAN_TAIWAN_NO_DFS = 0x14,
/* ===== 0x20 ~ 0x7F, new channel plan ===== */
RTW_CHPLAN_WORLD_NULL = 0x20,
RTW_CHPLAN_ETSI1_NULL = 0x21,
RTW_CHPLAN_FCC1_NULL = 0x22,
RTW_CHPLAN_MKK1_NULL = 0x23,
RTW_CHPLAN_ETSI2_NULL = 0x24,
RTW_CHPLAN_FCC1_FCC1 = 0x25,
RTW_CHPLAN_WORLD_ETSI1 = 0x26,
RTW_CHPLAN_MKK1_MKK1 = 0x27,
RTW_CHPLAN_WORLD_KCC1 = 0x28,
RTW_CHPLAN_WORLD_FCC2 = 0x29,
RTW_CHPLAN_FCC2_NULL = 0x2A,
RTW_CHPLAN_IC1_IC2 = 0x2B,
RTW_CHPLAN_MKK2_NULL = 0x2C,
RTW_CHPLAN_WORLD_CHILE1= 0x2D,
RTW_CHPLAN_WORLD1_WORLD1 = 0x2E,
RTW_CHPLAN_WORLD_CHILE2 = 0x2F,
RTW_CHPLAN_WORLD_FCC3 = 0x30,
RTW_CHPLAN_WORLD_FCC4 = 0x31,
RTW_CHPLAN_WORLD_FCC5 = 0x32,
RTW_CHPLAN_WORLD_FCC6 = 0x33,
RTW_CHPLAN_FCC1_FCC7 = 0x34,
RTW_CHPLAN_WORLD_ETSI2 = 0x35,
RTW_CHPLAN_WORLD_ETSI3 = 0x36,
RTW_CHPLAN_MKK1_MKK2 = 0x37,
RTW_CHPLAN_MKK1_MKK3 = 0x38,
RTW_CHPLAN_FCC1_NCC1 = 0x39,
RTW_CHPLAN_ETSI1_ETSI1 = 0x3A,
RTW_CHPLAN_ETSI1_ACMA1 = 0x3B,
RTW_CHPLAN_ETSI1_ETSI6 = 0x3C,
RTW_CHPLAN_ETSI1_ETSI12 = 0x3D,
RTW_CHPLAN_KCC1_KCC2 = 0x3E,
RTW_CHPLAN_FCC1_FCC11 = 0x3F,
RTW_CHPLAN_FCC1_NCC2 = 0x40,
RTW_CHPLAN_GLOBAL_NULL = 0x41,
RTW_CHPLAN_ETSI1_ETSI4 = 0x42,
RTW_CHPLAN_FCC1_FCC2 = 0x43,
RTW_CHPLAN_FCC1_NCC3 = 0x44,
RTW_CHPLAN_WORLD_ACMA1 = 0x45,
RTW_CHPLAN_FCC1_FCC8 = 0x46,
RTW_CHPLAN_WORLD_ETSI6 = 0x47,
RTW_CHPLAN_WORLD_ETSI7 = 0x48,
RTW_CHPLAN_WORLD_ETSI8 = 0x49,
RTW_CHPLAN_IC2_IC2 = 0x4A,
RTW_CHPLAN_KCC1_KCC3 = 0x4B,
RTW_CHPLAN_FCC1_FCC15 = 0x4C,
RTW_CHPLAN_FCC2_MEX1 = 0x4D,
RTW_CHPLAN_ETSI1_ETSI22 = 0x4E,
RTW_CHPLAN_WORLD_ETSI9 = 0x50,
RTW_CHPLAN_WORLD_ETSI10 = 0x51,
RTW_CHPLAN_WORLD_ETSI11 = 0x52,
RTW_CHPLAN_FCC1_NCC4 = 0x53,
RTW_CHPLAN_WORLD_ETSI12 = 0x54,
RTW_CHPLAN_FCC1_FCC9 = 0x55,
RTW_CHPLAN_WORLD_ETSI13 = 0x56,
RTW_CHPLAN_FCC1_FCC10 = 0x57,
RTW_CHPLAN_MKK2_MKK4 = 0x58,
RTW_CHPLAN_WORLD_ETSI14 = 0x59,
RTW_CHPLAN_FCC1_FCC5 = 0x60,
RTW_CHPLAN_FCC2_FCC7 = 0x61,
RTW_CHPLAN_FCC2_FCC1 = 0x62,
RTW_CHPLAN_WORLD_ETSI15 = 0x63,
RTW_CHPLAN_MKK2_MKK5 = 0x64,
RTW_CHPLAN_ETSI1_ETSI16 = 0x65,
RTW_CHPLAN_FCC1_FCC14 = 0x66,
RTW_CHPLAN_FCC1_FCC12 = 0x67,
RTW_CHPLAN_FCC2_FCC14 = 0x68,
RTW_CHPLAN_FCC2_FCC12 = 0x69,
RTW_CHPLAN_ETSI1_ETSI17 = 0x6A,
RTW_CHPLAN_WORLD_FCC16 = 0x6B,
RTW_CHPLAN_WORLD_FCC13 = 0x6C,
RTW_CHPLAN_FCC2_FCC15 = 0x6D,
RTW_CHPLAN_WORLD_FCC12 = 0x6E,
RTW_CHPLAN_NULL_ETSI8 = 0x6F,
RTW_CHPLAN_NULL_ETSI18 = 0x70,
RTW_CHPLAN_NULL_ETSI17 = 0x71,
RTW_CHPLAN_NULL_ETSI19 = 0x72,
RTW_CHPLAN_WORLD_FCC7 = 0x73,
RTW_CHPLAN_FCC2_FCC17 = 0x74,
RTW_CHPLAN_WORLD_ETSI20 = 0x75,
RTW_CHPLAN_FCC2_FCC11 = 0x76,
RTW_CHPLAN_WORLD_ETSI21 = 0x77,
RTW_CHPLAN_FCC1_FCC18 = 0x78,
RTW_CHPLAN_MKK2_MKK1 = 0x79,
RTW_CHPLAN_MAX,
RTW_CHPLAN_REALTEK_DEFINE = 0x7F,
RTW_CHPLAN_UNSPECIFIED = 0xFF,
};
u8 rtw_chplan_get_default_regd(u8 id);
bool rtw_chplan_is_empty(u8 id);
#define rtw_is_channel_plan_valid(chplan) (((chplan) < RTW_CHPLAN_MAX || (chplan) == RTW_CHPLAN_REALTEK_DEFINE) && !rtw_chplan_is_empty(chplan))
#define rtw_is_legacy_channel_plan(chplan) ((chplan) < 0x20)
struct _RT_CHANNEL_INFO;
u8 init_channel_set(_adapter *padapter, u8 ChannelPlan, struct _RT_CHANNEL_INFO *channel_set);
#define IS_ALPHA2_NO_SPECIFIED(_alpha2) ((*((u16 *)(_alpha2))) == 0xFFFF)
#define RTW_MODULE_RTL8821AE_HMC_M2 BIT0 /* RTL8821AE(HMC + M.2) */
#define RTW_MODULE_RTL8821AU BIT1 /* RTL8821AU */
#define RTW_MODULE_RTL8812AENF_NGFF BIT2 /* RTL8812AENF(8812AE+8761)_NGFF */
#define RTW_MODULE_RTL8812AEBT_HMC BIT3 /* RTL8812AEBT(8812AE+8761)_HMC */
#define RTW_MODULE_RTL8188EE_HMC_M2 BIT4 /* RTL8188EE(HMC + M.2) */
#define RTW_MODULE_RTL8723BE_HMC_M2 BIT5 /* RTL8723BE(HMC + M.2) */
#define RTW_MODULE_RTL8723BS_NGFF1216 BIT6 /* RTL8723BS(NGFF1216) */
#define RTW_MODULE_RTL8192EEBT_HMC_M2 BIT7 /* RTL8192EEBT(8192EE+8761AU)_(HMC + M.2) */
#define RTW_MODULE_RTL8723DE_NGFF1630 BIT8 /* RTL8723DE(NGFF1630) */
#define RTW_MODULE_RTL8822BE BIT9 /* RTL8822BE */
#define RTW_MODULE_RTL8821CE BIT10 /* RTL8821CE */
struct country_chplan {
char alpha2[2];
u8 chplan;
#ifdef CONFIG_80211AC_VHT
u8 en_11ac;
#endif
#if RTW_DEF_MODULE_REGULATORY_CERT
u16 def_module_flags; /* RTW_MODULE_RTLXXX */
#endif
};
#ifdef CONFIG_80211AC_VHT
#define COUNTRY_CHPLAN_EN_11AC(_ent) ((_ent)->en_11ac)
#else
#define COUNTRY_CHPLAN_EN_11AC(_ent) 0
#endif
#if RTW_DEF_MODULE_REGULATORY_CERT
#define COUNTRY_CHPLAN_DEF_MODULE_FALGS(_ent) ((_ent)->def_module_flags)
#else
#define COUNTRY_CHPLAN_DEF_MODULE_FALGS(_ent) 0
#endif
const struct country_chplan *rtw_get_chplan_from_country(const char *country_code);
void dump_country_chplan(void *sel, const struct country_chplan *ent);
void dump_country_chplan_map(void *sel);
void dump_chplan_id_list(void *sel);
void dump_chplan_test(void *sel);
void dump_chplan_ver(void *sel);
#endif /* __RTW_CHPLAN_H__ */

5813
core/rtw_cmd.c Normal file
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7258
core/rtw_debug.c Executable file
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329
core/rtw_eeprom.c Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#define _RTW_EEPROM_C_
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
void up_clk(_adapter *padapter, u16 *x)
{
*x = *x | _EESK;
rtw_write8(padapter, EE_9346CR, (u8)*x);
rtw_udelay_os(CLOCK_RATE);
}
void down_clk(_adapter *padapter, u16 *x)
{
*x = *x & ~_EESK;
rtw_write8(padapter, EE_9346CR, (u8)*x);
rtw_udelay_os(CLOCK_RATE);
}
void shift_out_bits(_adapter *padapter, u16 data, u16 count)
{
u16 x, mask;
if (rtw_is_surprise_removed(padapter)) {
goto out;
}
mask = 0x01 << (count - 1);
x = rtw_read8(padapter, EE_9346CR);
x &= ~(_EEDO | _EEDI);
do {
x &= ~_EEDI;
if (data & mask)
x |= _EEDI;
if (rtw_is_surprise_removed(padapter)) {
goto out;
}
rtw_write8(padapter, EE_9346CR, (u8)x);
rtw_udelay_os(CLOCK_RATE);
up_clk(padapter, &x);
down_clk(padapter, &x);
mask = mask >> 1;
} while (mask);
if (rtw_is_surprise_removed(padapter)) {
goto out;
}
x &= ~_EEDI;
rtw_write8(padapter, EE_9346CR, (u8)x);
out:
return;
}
u16 shift_in_bits(_adapter *padapter)
{
u16 x, d = 0, i;
if (rtw_is_surprise_removed(padapter)) {
goto out;
}
x = rtw_read8(padapter, EE_9346CR);
x &= ~(_EEDO | _EEDI);
d = 0;
for (i = 0; i < 16; i++) {
d = d << 1;
up_clk(padapter, &x);
if (rtw_is_surprise_removed(padapter)) {
goto out;
}
x = rtw_read8(padapter, EE_9346CR);
x &= ~(_EEDI);
if (x & _EEDO)
d |= 1;
down_clk(padapter, &x);
}
out:
return d;
}
void standby(_adapter *padapter)
{
u8 x;
x = rtw_read8(padapter, EE_9346CR);
x &= ~(_EECS | _EESK);
rtw_write8(padapter, EE_9346CR, x);
rtw_udelay_os(CLOCK_RATE);
x |= _EECS;
rtw_write8(padapter, EE_9346CR, x);
rtw_udelay_os(CLOCK_RATE);
}
u16 wait_eeprom_cmd_done(_adapter *padapter)
{
u8 x;
u16 i, res = _FALSE;
standby(padapter);
for (i = 0; i < 200; i++) {
x = rtw_read8(padapter, EE_9346CR);
if (x & _EEDO) {
res = _TRUE;
goto exit;
}
rtw_udelay_os(CLOCK_RATE);
}
exit:
return res;
}
void eeprom_clean(_adapter *padapter)
{
u16 x;
if (rtw_is_surprise_removed(padapter)) {
goto out;
}
x = rtw_read8(padapter, EE_9346CR);
if (rtw_is_surprise_removed(padapter)) {
goto out;
}
x &= ~(_EECS | _EEDI);
rtw_write8(padapter, EE_9346CR, (u8)x);
if (rtw_is_surprise_removed(padapter)) {
goto out;
}
up_clk(padapter, &x);
if (rtw_is_surprise_removed(padapter)) {
goto out;
}
down_clk(padapter, &x);
out:
return;
}
void eeprom_write16(_adapter *padapter, u16 reg, u16 data)
{
u8 x;
x = rtw_read8(padapter, EE_9346CR);
x &= ~(_EEDI | _EEDO | _EESK | _EEM0);
x |= _EEM1 | _EECS;
rtw_write8(padapter, EE_9346CR, x);
shift_out_bits(padapter, EEPROM_EWEN_OPCODE, 5);
if (padapter->EepromAddressSize == 8) /* CF+ and SDIO */
shift_out_bits(padapter, 0, 6);
else /* USB */
shift_out_bits(padapter, 0, 4);
standby(padapter);
/* Commented out by rcnjko, 2004.0
* Erase this particular word. Write the erase opcode and register
* number in that order. The opcode is 3bits in length; reg is 6 bits long. */
/* shift_out_bits(Adapter, EEPROM_ERASE_OPCODE, 3);
* shift_out_bits(Adapter, reg, Adapter->EepromAddressSize);
*
* if (wait_eeprom_cmd_done(Adapter ) == FALSE)
* {
* return;
* } */
standby(padapter);
/* write the new word to the EEPROM */
/* send the write opcode the EEPORM */
shift_out_bits(padapter, EEPROM_WRITE_OPCODE, 3);
/* select which word in the EEPROM that we are writing to. */
shift_out_bits(padapter, reg, padapter->EepromAddressSize);
/* write the data to the selected EEPROM word. */
shift_out_bits(padapter, data, 16);
if (wait_eeprom_cmd_done(padapter) == _FALSE)
goto exit;
standby(padapter);
shift_out_bits(padapter, EEPROM_EWDS_OPCODE, 5);
shift_out_bits(padapter, reg, 4);
eeprom_clean(padapter);
exit:
return;
}
u16 eeprom_read16(_adapter *padapter, u16 reg) /* ReadEEprom */
{
u16 x;
u16 data = 0;
if (rtw_is_surprise_removed(padapter)) {
goto out;
}
/* select EEPROM, reset bits, set _EECS */
x = rtw_read8(padapter, EE_9346CR);
if (rtw_is_surprise_removed(padapter)) {
goto out;
}
x &= ~(_EEDI | _EEDO | _EESK | _EEM0);
x |= _EEM1 | _EECS;
rtw_write8(padapter, EE_9346CR, (unsigned char)x);
/* write the read opcode and register number in that order */
/* The opcode is 3bits in length, reg is 6 bits long */
shift_out_bits(padapter, EEPROM_READ_OPCODE, 3);
shift_out_bits(padapter, reg, padapter->EepromAddressSize);
/* Now read the data (16 bits) in from the selected EEPROM word */
data = shift_in_bits(padapter);
eeprom_clean(padapter);
out:
return data;
}
/* From even offset */
void eeprom_read_sz(_adapter *padapter, u16 reg, u8 *data, u32 sz)
{
u16 x, data16;
u32 i;
if (rtw_is_surprise_removed(padapter)) {
goto out;
}
/* select EEPROM, reset bits, set _EECS */
x = rtw_read8(padapter, EE_9346CR);
if (rtw_is_surprise_removed(padapter)) {
goto out;
}
x &= ~(_EEDI | _EEDO | _EESK | _EEM0);
x |= _EEM1 | _EECS;
rtw_write8(padapter, EE_9346CR, (unsigned char)x);
/* write the read opcode and register number in that order */
/* The opcode is 3bits in length, reg is 6 bits long */
shift_out_bits(padapter, EEPROM_READ_OPCODE, 3);
shift_out_bits(padapter, reg, padapter->EepromAddressSize);
for (i = 0; i < sz; i += 2) {
data16 = shift_in_bits(padapter);
data[i] = data16 & 0xff;
data[i + 1] = data16 >> 8;
}
eeprom_clean(padapter);
out:
return;
}
/* addr_off : address offset of the entry in eeprom (not the tuple number of eeprom (reg); that is addr_off !=reg) */
u8 eeprom_read(_adapter *padapter, u32 addr_off, u8 sz, u8 *rbuf)
{
u8 quotient, remainder, addr_2align_odd;
u16 reg, stmp , i = 0, idx = 0;
reg = (u16)(addr_off >> 1);
addr_2align_odd = (u8)(addr_off & 0x1);
if (addr_2align_odd) { /* read that start at high part: e.g 1,3,5,7,9,... */
stmp = eeprom_read16(padapter, reg);
rbuf[idx++] = (u8)((stmp >> 8) & 0xff); /* return hogh-part of the short */
reg++;
sz--;
}
quotient = sz >> 1;
remainder = sz & 0x1;
for (i = 0 ; i < quotient; i++) {
stmp = eeprom_read16(padapter, reg + i);
rbuf[idx++] = (u8)(stmp & 0xff);
rbuf[idx++] = (u8)((stmp >> 8) & 0xff);
}
reg = reg + i;
if (remainder) { /* end of read at lower part of short : 0,2,4,6,... */
stmp = eeprom_read16(padapter, reg);
rbuf[idx] = (u8)(stmp & 0xff);
}
return _TRUE;
}
void read_eeprom_content(_adapter *padapter)
{
}

2954
core/rtw_ieee80211.c Executable file
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core/rtw_io.c Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
/*
The purpose of rtw_io.c
a. provides the API
b. provides the protocol engine
c. provides the software interface between caller and the hardware interface
Compiler Flag Option:
1. CONFIG_SDIO_HCI:
a. USE_SYNC_IRP: Only sync operations are provided.
b. USE_ASYNC_IRP:Both sync/async operations are provided.
2. CONFIG_USB_HCI:
a. USE_ASYNC_IRP: Both sync/async operations are provided.
3. CONFIG_CFIO_HCI:
b. USE_SYNC_IRP: Only sync operations are provided.
Only sync read/rtw_write_mem operations are provided.
jackson@realtek.com.tw
*/
#define _RTW_IO_C_
#include <drv_types.h>
#include <hal_data.h>
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_PLATFORM_RTL8197D)
#define rtw_le16_to_cpu(val) val
#define rtw_le32_to_cpu(val) val
#define rtw_cpu_to_le16(val) val
#define rtw_cpu_to_le32(val) val
#else
#define rtw_le16_to_cpu(val) le16_to_cpu(val)
#define rtw_le32_to_cpu(val) le32_to_cpu(val)
#define rtw_cpu_to_le16(val) cpu_to_le16(val)
#define rtw_cpu_to_le32(val) cpu_to_le32(val)
#endif
u8 _rtw_read8(_adapter *adapter, u32 addr)
{
u8 r_val;
/* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
u8(*_read8)(struct intf_hdl *pintfhdl, u32 addr);
_read8 = pintfhdl->io_ops._read8;
r_val = _read8(pintfhdl, addr);
return r_val;
}
u16 _rtw_read16(_adapter *adapter, u32 addr)
{
u16 r_val;
/* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
u16(*_read16)(struct intf_hdl *pintfhdl, u32 addr);
_read16 = pintfhdl->io_ops._read16;
r_val = _read16(pintfhdl, addr);
return rtw_le16_to_cpu(r_val);
}
u32 _rtw_read32(_adapter *adapter, u32 addr)
{
u32 r_val;
/* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
u32(*_read32)(struct intf_hdl *pintfhdl, u32 addr);
_read32 = pintfhdl->io_ops._read32;
r_val = _read32(pintfhdl, addr);
return rtw_le32_to_cpu(r_val);
}
int _rtw_write8(_adapter *adapter, u32 addr, u8 val)
{
/* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
int (*_write8)(struct intf_hdl *pintfhdl, u32 addr, u8 val);
int ret;
_write8 = pintfhdl->io_ops._write8;
ret = _write8(pintfhdl, addr, val);
return RTW_STATUS_CODE(ret);
}
int _rtw_write16(_adapter *adapter, u32 addr, u16 val)
{
/* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
int (*_write16)(struct intf_hdl *pintfhdl, u32 addr, u16 val);
int ret;
_write16 = pintfhdl->io_ops._write16;
val = rtw_cpu_to_le16(val);
ret = _write16(pintfhdl, addr, val);
return RTW_STATUS_CODE(ret);
}
int _rtw_write32(_adapter *adapter, u32 addr, u32 val)
{
/* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
int (*_write32)(struct intf_hdl *pintfhdl, u32 addr, u32 val);
int ret;
_write32 = pintfhdl->io_ops._write32;
val = rtw_cpu_to_le32(val);
ret = _write32(pintfhdl, addr, val);
return RTW_STATUS_CODE(ret);
}
int _rtw_writeN(_adapter *adapter, u32 addr , u32 length , u8 *pdata)
{
/* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = (struct intf_hdl *)(&(pio_priv->intf));
int (*_writeN)(struct intf_hdl *pintfhdl, u32 addr, u32 length, u8 *pdata);
int ret;
_writeN = pintfhdl->io_ops._writeN;
ret = _writeN(pintfhdl, addr, length, pdata);
return RTW_STATUS_CODE(ret);
}
#ifdef CONFIG_SDIO_HCI
u8 _rtw_sd_f0_read8(_adapter *adapter, u32 addr)
{
u8 r_val = 0x00;
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
u8(*_sd_f0_read8)(struct intf_hdl *pintfhdl, u32 addr);
_sd_f0_read8 = pintfhdl->io_ops._sd_f0_read8;
if (_sd_f0_read8)
r_val = _sd_f0_read8(pintfhdl, addr);
else
RTW_WARN(FUNC_ADPT_FMT" _sd_f0_read8 callback is NULL\n", FUNC_ADPT_ARG(adapter));
return r_val;
}
#ifdef CONFIG_SDIO_INDIRECT_ACCESS
u8 _rtw_sd_iread8(_adapter *adapter, u32 addr)
{
u8 r_val = 0x00;
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
u8(*_sd_iread8)(struct intf_hdl *pintfhdl, u32 addr);
_sd_iread8 = pintfhdl->io_ops._sd_iread8;
if (_sd_iread8)
r_val = _sd_iread8(pintfhdl, addr);
else
RTW_ERR(FUNC_ADPT_FMT" _sd_iread8 callback is NULL\n", FUNC_ADPT_ARG(adapter));
return r_val;
}
u16 _rtw_sd_iread16(_adapter *adapter, u32 addr)
{
u16 r_val = 0x00;
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
u16(*_sd_iread16)(struct intf_hdl *pintfhdl, u32 addr);
_sd_iread16 = pintfhdl->io_ops._sd_iread16;
if (_sd_iread16)
r_val = _sd_iread16(pintfhdl, addr);
else
RTW_ERR(FUNC_ADPT_FMT" _sd_iread16 callback is NULL\n", FUNC_ADPT_ARG(adapter));
return r_val;
}
u32 _rtw_sd_iread32(_adapter *adapter, u32 addr)
{
u32 r_val = 0x00;
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
u32(*_sd_iread32)(struct intf_hdl *pintfhdl, u32 addr);
_sd_iread32 = pintfhdl->io_ops._sd_iread32;
if (_sd_iread32)
r_val = _sd_iread32(pintfhdl, addr);
else
RTW_ERR(FUNC_ADPT_FMT" _sd_iread32 callback is NULL\n", FUNC_ADPT_ARG(adapter));
return r_val;
}
int _rtw_sd_iwrite8(_adapter *adapter, u32 addr, u8 val)
{
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
int (*_sd_iwrite8)(struct intf_hdl *pintfhdl, u32 addr, u8 val);
int ret = -1;
_sd_iwrite8 = pintfhdl->io_ops._sd_iwrite8;
if (_sd_iwrite8)
ret = _sd_iwrite8(pintfhdl, addr, val);
else
RTW_ERR(FUNC_ADPT_FMT" _sd_iwrite8 callback is NULL\n", FUNC_ADPT_ARG(adapter));
return RTW_STATUS_CODE(ret);
}
int _rtw_sd_iwrite16(_adapter *adapter, u32 addr, u16 val)
{
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
int (*_sd_iwrite16)(struct intf_hdl *pintfhdl, u32 addr, u16 val);
int ret = -1;
_sd_iwrite16 = pintfhdl->io_ops._sd_iwrite16;
if (_sd_iwrite16)
ret = _sd_iwrite16(pintfhdl, addr, val);
else
RTW_ERR(FUNC_ADPT_FMT" _sd_iwrite16 callback is NULL\n", FUNC_ADPT_ARG(adapter));
return RTW_STATUS_CODE(ret);
}
int _rtw_sd_iwrite32(_adapter *adapter, u32 addr, u32 val)
{
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
int (*_sd_iwrite32)(struct intf_hdl *pintfhdl, u32 addr, u32 val);
int ret = -1;
_sd_iwrite32 = pintfhdl->io_ops._sd_iwrite32;
if (_sd_iwrite32)
ret = _sd_iwrite32(pintfhdl, addr, val);
else
RTW_ERR(FUNC_ADPT_FMT" _sd_iwrite32 callback is NULL\n", FUNC_ADPT_ARG(adapter));
return RTW_STATUS_CODE(ret);
}
#endif /* CONFIG_SDIO_INDIRECT_ACCESS */
#endif /* CONFIG_SDIO_HCI */
int _rtw_write8_async(_adapter *adapter, u32 addr, u8 val)
{
/* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
int (*_write8_async)(struct intf_hdl *pintfhdl, u32 addr, u8 val);
int ret;
_write8_async = pintfhdl->io_ops._write8_async;
ret = _write8_async(pintfhdl, addr, val);
return RTW_STATUS_CODE(ret);
}
int _rtw_write16_async(_adapter *adapter, u32 addr, u16 val)
{
/* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
int (*_write16_async)(struct intf_hdl *pintfhdl, u32 addr, u16 val);
int ret;
_write16_async = pintfhdl->io_ops._write16_async;
val = rtw_cpu_to_le16(val);
ret = _write16_async(pintfhdl, addr, val);
return RTW_STATUS_CODE(ret);
}
int _rtw_write32_async(_adapter *adapter, u32 addr, u32 val)
{
/* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
int (*_write32_async)(struct intf_hdl *pintfhdl, u32 addr, u32 val);
int ret;
_write32_async = pintfhdl->io_ops._write32_async;
val = rtw_cpu_to_le32(val);
ret = _write32_async(pintfhdl, addr, val);
return RTW_STATUS_CODE(ret);
}
void _rtw_read_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
{
void (*_read_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
/* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
if (RTW_CANNOT_RUN(adapter)) {
return;
}
_read_mem = pintfhdl->io_ops._read_mem;
_read_mem(pintfhdl, addr, cnt, pmem);
}
void _rtw_write_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
{
void (*_write_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
/* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
_write_mem = pintfhdl->io_ops._write_mem;
_write_mem(pintfhdl, addr, cnt, pmem);
}
void _rtw_read_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
{
u32(*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
/* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
if (RTW_CANNOT_RUN(adapter)) {
return;
}
_read_port = pintfhdl->io_ops._read_port;
_read_port(pintfhdl, addr, cnt, pmem);
}
void _rtw_read_port_cancel(_adapter *adapter)
{
void (*_read_port_cancel)(struct intf_hdl *pintfhdl);
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
_read_port_cancel = pintfhdl->io_ops._read_port_cancel;
RTW_DISABLE_FUNC(adapter, DF_RX_BIT);
if (_read_port_cancel)
_read_port_cancel(pintfhdl);
}
u32 _rtw_write_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
{
u32(*_write_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
/* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
u32 ret = _SUCCESS;
_write_port = pintfhdl->io_ops._write_port;
ret = _write_port(pintfhdl, addr, cnt, pmem);
return ret;
}
u32 _rtw_write_port_and_wait(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem, int timeout_ms)
{
int ret = _SUCCESS;
struct xmit_buf *pxmitbuf = (struct xmit_buf *)pmem;
struct submit_ctx sctx;
rtw_sctx_init(&sctx, timeout_ms);
pxmitbuf->sctx = &sctx;
ret = _rtw_write_port(adapter, addr, cnt, pmem);
if (ret == _SUCCESS) {
ret = rtw_sctx_wait(&sctx, __func__);
if (ret != _SUCCESS)
pxmitbuf->sctx = NULL;
}
return ret;
}
void _rtw_write_port_cancel(_adapter *adapter)
{
void (*_write_port_cancel)(struct intf_hdl *pintfhdl);
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
_write_port_cancel = pintfhdl->io_ops._write_port_cancel;
RTW_DISABLE_FUNC(adapter, DF_TX_BIT);
if (_write_port_cancel)
_write_port_cancel(pintfhdl);
}
int rtw_init_io_priv(_adapter *padapter, void (*set_intf_ops)(_adapter *padapter, struct _io_ops *pops))
{
struct io_priv *piopriv = &padapter->iopriv;
struct intf_hdl *pintf = &piopriv->intf;
if (set_intf_ops == NULL)
return _FAIL;
piopriv->padapter = padapter;
pintf->padapter = padapter;
pintf->pintf_dev = adapter_to_dvobj(padapter);
set_intf_ops(padapter, &pintf->io_ops);
return _SUCCESS;
}
/*
* Increase and check if the continual_io_error of this @param dvobjprive is larger than MAX_CONTINUAL_IO_ERR
* @return _TRUE:
* @return _FALSE:
*/
int rtw_inc_and_chk_continual_io_error(struct dvobj_priv *dvobj)
{
int ret = _FALSE;
int value;
value = ATOMIC_INC_RETURN(&dvobj->continual_io_error);
if (value > MAX_CONTINUAL_IO_ERR) {
RTW_INFO("[dvobj:%p][ERROR] continual_io_error:%d > %d\n", dvobj, value, MAX_CONTINUAL_IO_ERR);
ret = _TRUE;
} else {
/* RTW_INFO("[dvobj:%p] continual_io_error:%d\n", dvobj, value); */
}
return ret;
}
/*
* Set the continual_io_error of this @param dvobjprive to 0
*/
void rtw_reset_continual_io_error(struct dvobj_priv *dvobj)
{
ATOMIC_SET(&dvobj->continual_io_error, 0);
}
#ifdef DBG_IO
#define RTW_IO_SNIFF_TYPE_RANGE 0 /* specific address range is accessed */
#define RTW_IO_SNIFF_TYPE_VALUE 1 /* value match for sniffed range */
struct rtw_io_sniff_ent {
u8 chip;
u8 hci;
u32 addr;
u8 type;
union {
u32 end_addr;
struct {
u32 mask;
u32 val;
bool equal;
} vm; /* value match */
} u;
bool trace;
char *tag;
};
#define RTW_IO_SNIFF_RANGE_ENT(_chip, _hci, _addr, _end_addr, _trace, _tag) \
{.chip = _chip, .hci = _hci, .addr = _addr, .u.end_addr = _end_addr, .trace = _trace, .tag = _tag, .type = RTW_IO_SNIFF_TYPE_RANGE,}
#define RTW_IO_SNIFF_VALUE_ENT(_chip, _hci, _addr, _mask, _val, _equal, _trace, _tag) \
{.chip = _chip, .hci = _hci, .addr = _addr, .u.vm.mask = _mask, .u.vm.val = _val, .u.vm.equal = _equal, .trace = _trace, .tag = _tag, .type = RTW_IO_SNIFF_TYPE_VALUE,}
/* part or all sniffed range is enabled (not all 0) */
#define RTW_IO_SNIFF_EN_ENT(_chip, _hci, _addr, _mask, _trace, _tag) \
{.chip = _chip, .hci = _hci, .addr = _addr, .u.vm.mask = _mask, .u.vm.val = 0, .u.vm.equal = 0, .trace = _trace, .tag = _tag, .type = RTW_IO_SNIFF_TYPE_VALUE,}
/* part or all sniffed range is disabled (not all 1) */
#define RTW_IO_SNIFF_DIS_ENT(_chip, _hci, _addr, _mask, _trace, _tag) \
{.chip = _chip, .hci = _hci, .addr = _addr, .u.vm.mask = _mask, .u.vm.val = 0xFFFFFFFF, .u.vm.equal = 0, .trace = _trace, .tag = _tag, .type = RTW_IO_SNIFF_TYPE_VALUE,}
const struct rtw_io_sniff_ent read_sniff[] = {
#ifdef DBG_IO_HCI_EN_CHK
RTW_IO_SNIFF_EN_ENT(MAX_CHIP_TYPE, RTW_SDIO, 0x02, 0x1FC, 1, "SDIO 0x02[8:2] not all 0"),
RTW_IO_SNIFF_EN_ENT(MAX_CHIP_TYPE, RTW_USB, 0x02, 0x1E0, 1, "USB 0x02[8:5] not all 0"),
RTW_IO_SNIFF_EN_ENT(MAX_CHIP_TYPE, RTW_PCIE, 0x02, 0x01C, 1, "PCI 0x02[4:2] not all 0"),
#endif
#ifdef DBG_IO_SNIFF_EXAMPLE
RTW_IO_SNIFF_RANGE_ENT(MAX_CHIP_TYPE, 0, 0x522, 0x522, 0, "read TXPAUSE"),
RTW_IO_SNIFF_DIS_ENT(MAX_CHIP_TYPE, 0, 0x02, 0x3, 0, "0x02[1:0] not all 1"),
#endif
};
const int read_sniff_num = sizeof(read_sniff) / sizeof(struct rtw_io_sniff_ent);
const struct rtw_io_sniff_ent write_sniff[] = {
#ifdef DBG_IO_HCI_EN_CHK
RTW_IO_SNIFF_EN_ENT(MAX_CHIP_TYPE, RTW_SDIO, 0x02, 0x1FC, 1, "SDIO 0x02[8:2] not all 0"),
RTW_IO_SNIFF_EN_ENT(MAX_CHIP_TYPE, RTW_USB, 0x02, 0x1E0, 1, "USB 0x02[8:5] not all 0"),
RTW_IO_SNIFF_EN_ENT(MAX_CHIP_TYPE, RTW_PCIE, 0x02, 0x01C, 1, "PCI 0x02[4:2] not all 0"),
#endif
#ifdef DBG_IO_8822C_1TX_PATH_EN
RTW_IO_SNIFF_VALUE_ENT(RTL8822C, 0, 0x1a04, 0xc0000000, 0x02, 1, 0, "write tx_path_en_cck A enabled"),
RTW_IO_SNIFF_VALUE_ENT(RTL8822C, 0, 0x1a04, 0xc0000000, 0x01, 1, 0, "write tx_path_en_cck B enabled"),
RTW_IO_SNIFF_VALUE_ENT(RTL8822C, 0, 0x1a04, 0xc0000000, 0x03, 1, 1, "write tx_path_en_cck AB enabled"),
RTW_IO_SNIFF_VALUE_ENT(RTL8822C, 0, 0x820, 0x03, 0x01, 1, 0, "write tx_path_en_ofdm_1sts A enabled"),
RTW_IO_SNIFF_VALUE_ENT(RTL8822C, 0, 0x820, 0x03, 0x02, 1, 0, "write tx_path_en_ofdm_1sts B enabled"),
RTW_IO_SNIFF_VALUE_ENT(RTL8822C, 0, 0x820, 0x03, 0x03, 1, 1, "write tx_path_en_ofdm_1sts AB enabled"),
RTW_IO_SNIFF_VALUE_ENT(RTL8822C, 0, 0x820, 0x30, 0x01, 1, 0, "write tx_path_en_ofdm_2sts A enabled"),
RTW_IO_SNIFF_VALUE_ENT(RTL8822C, 0, 0x820, 0x30, 0x02, 1, 0, "write tx_path_en_ofdm_2sts B enabled"),
RTW_IO_SNIFF_VALUE_ENT(RTL8822C, 0, 0x820, 0x30, 0x03, 1, 1, "write tx_path_en_ofdm_2sts AB enabled"),
#endif
#ifdef DBG_IO_SNIFF_EXAMPLE
RTW_IO_SNIFF_RANGE_ENT(MAX_CHIP_TYPE, 0, 0x522, 0x522, 0, "write TXPAUSE"),
RTW_IO_SNIFF_DIS_ENT(MAX_CHIP_TYPE, 0, 0x02, 0x3, 0, "0x02[1:0] not all 1"),
#endif
};
const int write_sniff_num = sizeof(write_sniff) / sizeof(struct rtw_io_sniff_ent);
static bool match_io_sniff_ranges(_adapter *adapter
, const struct rtw_io_sniff_ent *sniff, int i, u32 addr, u16 len)
{
/* check if IO range after sniff end address */
if (addr > sniff->u.end_addr)
return 0;
return 1;
}
static bool match_io_sniff_value(_adapter *adapter
, const struct rtw_io_sniff_ent *sniff, int i, u32 addr, u8 len, u32 val)
{
u8 sniff_len;
s8 mask_shift;
u32 mask;
s8 value_shift;
u32 value;
bool ret = 0;
/* check if IO range after sniff end address */
sniff_len = 4;
while (!(sniff->u.vm.mask & (0xFF << ((sniff_len - 1) * 8)))) {
sniff_len--;
if (sniff_len == 0)
goto exit;
}
if (sniff->addr + sniff_len <= addr)
goto exit;
/* align to IO addr */
mask_shift = (sniff->addr - addr) * 8;
value_shift = mask_shift + bitshift(sniff->u.vm.mask);
if (mask_shift > 0)
mask = sniff->u.vm.mask << mask_shift;
else if (mask_shift < 0)
mask = sniff->u.vm.mask >> -mask_shift;
else
mask = sniff->u.vm.mask;
if (value_shift > 0)
value = sniff->u.vm.val << value_shift;
else if (mask_shift < 0)
value = sniff->u.vm.val >> -value_shift;
else
value = sniff->u.vm.val;
if ((sniff->u.vm.equal && (mask & val) == (mask & value))
|| (!sniff->u.vm.equal && (mask & val) != (mask & value))
) {
ret = 1;
if (0)
RTW_INFO(FUNC_ADPT_FMT" addr:0x%x len:%u val:0x%x (i:%d sniff_len:%u m_shift:%d mask:0x%x v_shifd:%d value:0x%x equal:%d)\n"
, FUNC_ADPT_ARG(adapter), addr, len, val, i, sniff_len, mask_shift, mask, value_shift, value, sniff->u.vm.equal);
}
exit:
return ret;
}
static bool match_io_sniff(_adapter *adapter
, const struct rtw_io_sniff_ent *sniff, int i, u32 addr, u8 len, u32 val)
{
bool ret = 0;
if (sniff->chip != MAX_CHIP_TYPE
&& sniff->chip != rtw_get_chip_type(adapter))
goto exit;
if (sniff->hci
&& !(sniff->hci & rtw_get_intf_type(adapter)))
goto exit;
if (sniff->addr >= addr + len) /* IO range below sniff start address */
goto exit;
switch (sniff->type) {
case RTW_IO_SNIFF_TYPE_RANGE:
ret = match_io_sniff_ranges(adapter, sniff, i, addr, len);
break;
case RTW_IO_SNIFF_TYPE_VALUE:
if (len == 1 || len == 2 || len == 4)
ret = match_io_sniff_value(adapter, sniff, i, addr, len, val);
break;
default:
rtw_warn_on(1);
break;
}
exit:
return ret;
}
u32 match_read_sniff(_adapter *adapter, u32 addr, u16 len, u32 val)
{
int i;
bool trace = 0;
u32 match = 0;
for (i = 0; i < read_sniff_num; i++) {
if (match_io_sniff(adapter, &read_sniff[i], i, addr, len, val)) {
match++;
trace |= read_sniff[i].trace;
if (read_sniff[i].tag)
RTW_INFO("DBG_IO TAG %s\n", read_sniff[i].tag);
}
}
rtw_warn_on(trace);
return match;
}
u32 match_write_sniff(_adapter *adapter, u32 addr, u16 len, u32 val)
{
int i;
bool trace = 0;
u32 match = 0;
for (i = 0; i < write_sniff_num; i++) {
if (match_io_sniff(adapter, &write_sniff[i], i, addr, len, val)) {
match++;
trace |= write_sniff[i].trace;
if (write_sniff[i].tag)
RTW_INFO("DBG_IO TAG %s\n", write_sniff[i].tag);
}
}
rtw_warn_on(trace);
return match;
}
struct rf_sniff_ent {
u8 path;
u16 reg;
u32 mask;
};
struct rf_sniff_ent rf_read_sniff_ranges[] = {
/* example for all path addr 0x55 with all RF Reg mask */
/* {MAX_RF_PATH, 0x55, bRFRegOffsetMask}, */
};
struct rf_sniff_ent rf_write_sniff_ranges[] = {
/* example for all path addr 0x55 with all RF Reg mask */
/* {MAX_RF_PATH, 0x55, bRFRegOffsetMask}, */
};
int rf_read_sniff_num = sizeof(rf_read_sniff_ranges) / sizeof(struct rf_sniff_ent);
int rf_write_sniff_num = sizeof(rf_write_sniff_ranges) / sizeof(struct rf_sniff_ent);
bool match_rf_read_sniff_ranges(_adapter *adapter, u8 path, u32 addr, u32 mask)
{
int i;
for (i = 0; i < rf_read_sniff_num; i++) {
if (rf_read_sniff_ranges[i].path == MAX_RF_PATH || rf_read_sniff_ranges[i].path == path)
if (addr == rf_read_sniff_ranges[i].reg && (mask & rf_read_sniff_ranges[i].mask))
return _TRUE;
}
return _FALSE;
}
bool match_rf_write_sniff_ranges(_adapter *adapter, u8 path, u32 addr, u32 mask)
{
int i;
for (i = 0; i < rf_write_sniff_num; i++) {
if (rf_write_sniff_ranges[i].path == MAX_RF_PATH || rf_write_sniff_ranges[i].path == path)
if (addr == rf_write_sniff_ranges[i].reg && (mask & rf_write_sniff_ranges[i].mask))
return _TRUE;
}
return _FALSE;
}
u8 dbg_rtw_read8(_adapter *adapter, u32 addr, const char *caller, const int line)
{
u8 val = _rtw_read8(adapter, addr);
if (match_read_sniff(adapter, addr, 1, val)) {
RTW_INFO("DBG_IO %s:%d rtw_read8(0x%04x) return 0x%02x\n"
, caller, line, addr, val);
}
return val;
}
u16 dbg_rtw_read16(_adapter *adapter, u32 addr, const char *caller, const int line)
{
u16 val = _rtw_read16(adapter, addr);
if (match_read_sniff(adapter, addr, 2, val)) {
RTW_INFO("DBG_IO %s:%d rtw_read16(0x%04x) return 0x%04x\n"
, caller, line, addr, val);
}
return val;
}
u32 dbg_rtw_read32(_adapter *adapter, u32 addr, const char *caller, const int line)
{
u32 val = _rtw_read32(adapter, addr);
if (match_read_sniff(adapter, addr, 4, val)) {
RTW_INFO("DBG_IO %s:%d rtw_read32(0x%04x) return 0x%08x\n"
, caller, line, addr, val);
}
return val;
}
int dbg_rtw_write8(_adapter *adapter, u32 addr, u8 val, const char *caller, const int line)
{
if (match_write_sniff(adapter, addr, 1, val)) {
RTW_INFO("DBG_IO %s:%d rtw_write8(0x%04x, 0x%02x)\n"
, caller, line, addr, val);
}
return _rtw_write8(adapter, addr, val);
}
int dbg_rtw_write16(_adapter *adapter, u32 addr, u16 val, const char *caller, const int line)
{
if (match_write_sniff(adapter, addr, 2, val)) {
RTW_INFO("DBG_IO %s:%d rtw_write16(0x%04x, 0x%04x)\n"
, caller, line, addr, val);
}
return _rtw_write16(adapter, addr, val);
}
int dbg_rtw_write32(_adapter *adapter, u32 addr, u32 val, const char *caller, const int line)
{
if (match_write_sniff(adapter, addr, 4, val)) {
RTW_INFO("DBG_IO %s:%d rtw_write32(0x%04x, 0x%08x)\n"
, caller, line, addr, val);
}
return _rtw_write32(adapter, addr, val);
}
int dbg_rtw_writeN(_adapter *adapter, u32 addr , u32 length , u8 *data, const char *caller, const int line)
{
if (match_write_sniff(adapter, addr, length, 0)) {
RTW_INFO("DBG_IO %s:%d rtw_writeN(0x%04x, %u)\n"
, caller, line, addr, length);
}
return _rtw_writeN(adapter, addr, length, data);
}
#ifdef CONFIG_SDIO_HCI
u8 dbg_rtw_sd_f0_read8(_adapter *adapter, u32 addr, const char *caller, const int line)
{
u8 val = _rtw_sd_f0_read8(adapter, addr);
#if 0
if (match_read_sniff(adapter, addr, 1, val)) {
RTW_INFO("DBG_IO %s:%d rtw_sd_f0_read8(0x%04x) return 0x%02x\n"
, caller, line, addr, val);
}
#endif
return val;
}
#ifdef CONFIG_SDIO_INDIRECT_ACCESS
u8 dbg_rtw_sd_iread8(_adapter *adapter, u32 addr, const char *caller, const int line)
{
u8 val = rtw_sd_iread8(adapter, addr);
if (match_read_sniff(adapter, addr, 1, val)) {
RTW_INFO("DBG_IO %s:%d rtw_sd_iread8(0x%04x) return 0x%02x\n"
, caller, line, addr, val);
}
return val;
}
u16 dbg_rtw_sd_iread16(_adapter *adapter, u32 addr, const char *caller, const int line)
{
u16 val = _rtw_sd_iread16(adapter, addr);
if (match_read_sniff(adapter, addr, 2, val)) {
RTW_INFO("DBG_IO %s:%d rtw_sd_iread16(0x%04x) return 0x%04x\n"
, caller, line, addr, val);
}
return val;
}
u32 dbg_rtw_sd_iread32(_adapter *adapter, u32 addr, const char *caller, const int line)
{
u32 val = _rtw_sd_iread32(adapter, addr);
if (match_read_sniff(adapter, addr, 4, val)) {
RTW_INFO("DBG_IO %s:%d rtw_sd_iread32(0x%04x) return 0x%08x\n"
, caller, line, addr, val);
}
return val;
}
int dbg_rtw_sd_iwrite8(_adapter *adapter, u32 addr, u8 val, const char *caller, const int line)
{
if (match_write_sniff(adapter, addr, 1, val)) {
RTW_INFO("DBG_IO %s:%d rtw_sd_iwrite8(0x%04x, 0x%02x)\n"
, caller, line, addr, val);
}
return _rtw_sd_iwrite8(adapter, addr, val);
}
int dbg_rtw_sd_iwrite16(_adapter *adapter, u32 addr, u16 val, const char *caller, const int line)
{
if (match_write_sniff(adapter, addr, 2, val)) {
RTW_INFO("DBG_IO %s:%d rtw_sd_iwrite16(0x%04x, 0x%04x)\n"
, caller, line, addr, val);
}
return _rtw_sd_iwrite16(adapter, addr, val);
}
int dbg_rtw_sd_iwrite32(_adapter *adapter, u32 addr, u32 val, const char *caller, const int line)
{
if (match_write_sniff(adapter, addr, 4, val)) {
RTW_INFO("DBG_IO %s:%d rtw_sd_iwrite32(0x%04x, 0x%08x)\n"
, caller, line, addr, val);
}
return _rtw_sd_iwrite32(adapter, addr, val);
}
#endif /* CONFIG_SDIO_INDIRECT_ACCESS */
#endif /* CONFIG_SDIO_HCI */
#endif

19
core/rtw_ioctl_query.c Normal file
View File

@ -0,0 +1,19 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#define _RTW_IOCTL_QUERY_C_
#include <drv_types.h>

851
core/rtw_ioctl_set.c Normal file
View File

@ -0,0 +1,851 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#define _RTW_IOCTL_SET_C_
#include <drv_types.h>
#include <hal_data.h>
extern void indicate_wx_scan_complete_event(_adapter *padapter);
#define IS_MAC_ADDRESS_BROADCAST(addr) \
(\
((addr[0] == 0xff) && (addr[1] == 0xff) && \
(addr[2] == 0xff) && (addr[3] == 0xff) && \
(addr[4] == 0xff) && (addr[5] == 0xff)) ? _TRUE : _FALSE \
)
u8 rtw_validate_bssid(u8 *bssid)
{
u8 ret = _TRUE;
if (is_zero_mac_addr(bssid)
|| is_broadcast_mac_addr(bssid)
|| is_multicast_mac_addr(bssid)
)
ret = _FALSE;
return ret;
}
u8 rtw_validate_ssid(NDIS_802_11_SSID *ssid)
{
#ifdef CONFIG_VALIDATE_SSID
u8 i;
#endif
u8 ret = _TRUE;
if (ssid->SsidLength > 32) {
ret = _FALSE;
goto exit;
}
#ifdef CONFIG_VALIDATE_SSID
for (i = 0; i < ssid->SsidLength; i++) {
/* wifi, printable ascii code must be supported */
if (!((ssid->Ssid[i] >= 0x20) && (ssid->Ssid[i] <= 0x7e))) {
ret = _FALSE;
break;
}
}
#endif /* CONFIG_VALIDATE_SSID */
exit:
return ret;
}
u8 rtw_do_join(_adapter *padapter);
u8 rtw_do_join(_adapter *padapter)
{
_irqL irqL;
_list *plist, *phead;
u8 *pibss = NULL;
struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
struct sitesurvey_parm parm;
_queue *queue = &(pmlmepriv->scanned_queue);
u8 ret = _SUCCESS;
_enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
phead = get_list_head(queue);
plist = get_next(phead);
pmlmepriv->cur_network.join_res = -2;
set_fwstate(pmlmepriv, _FW_UNDER_LINKING);
pmlmepriv->pscanned = plist;
pmlmepriv->to_join = _TRUE;
rtw_init_sitesurvey_parm(padapter, &parm);
_rtw_memcpy(&parm.ssid[0], &pmlmepriv->assoc_ssid, sizeof(NDIS_802_11_SSID));
parm.ssid_num = 1;
if (pmlmepriv->assoc_ch) {
parm.ch_num = 1;
parm.ch[0].hw_value = pmlmepriv->assoc_ch;
parm.ch[0].flags = 0;
}
if (_rtw_queue_empty(queue) == _TRUE) {
_exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
/* when set_ssid/set_bssid for rtw_do_join(), but scanning queue is empty */
/* we try to issue sitesurvey firstly */
if (pmlmepriv->LinkDetectInfo.bBusyTraffic == _FALSE
|| rtw_to_roam(padapter) > 0
) {
u8 ssc_chk = rtw_sitesurvey_condition_check(padapter, _FALSE);
if ((ssc_chk == SS_ALLOW) || (ssc_chk == SS_DENY_BUSY_TRAFFIC) ){
/* submit site_survey_cmd */
ret = rtw_sitesurvey_cmd(padapter, &parm);
if (_SUCCESS != ret)
pmlmepriv->to_join = _FALSE;
} else {
/*if (ssc_chk == SS_DENY_BUDDY_UNDER_SURVEY)*/
pmlmepriv->to_join = _FALSE;
ret = _FAIL;
}
} else {
pmlmepriv->to_join = _FALSE;
ret = _FAIL;
}
goto exit;
} else {
int select_ret;
_exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
select_ret = rtw_select_and_join_from_scanned_queue(pmlmepriv);
if (select_ret == _SUCCESS) {
pmlmepriv->to_join = _FALSE;
_set_timer(&pmlmepriv->assoc_timer, MAX_JOIN_TIMEOUT);
} else {
if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) {
/* submit createbss_cmd to change to a ADHOC_MASTER */
/* pmlmepriv->lock has been acquired by caller... */
WLAN_BSSID_EX *pdev_network = &(padapter->registrypriv.dev_network);
/*pmlmepriv->fw_state = WIFI_ADHOC_MASTER_STATE;*/
init_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE);
pibss = padapter->registrypriv.dev_network.MacAddress;
_rtw_memset(&pdev_network->Ssid, 0, sizeof(NDIS_802_11_SSID));
_rtw_memcpy(&pdev_network->Ssid, &pmlmepriv->assoc_ssid, sizeof(NDIS_802_11_SSID));
rtw_update_registrypriv_dev_network(padapter);
rtw_generate_random_ibss(pibss);
if (rtw_create_ibss_cmd(padapter, 0) != _SUCCESS) {
ret = _FALSE;
goto exit;
}
pmlmepriv->to_join = _FALSE;
} else {
/* can't associate ; reset under-linking */
_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
/* when set_ssid/set_bssid for rtw_do_join(), but there are no desired bss in scanning queue */
/* we try to issue sitesurvey firstly */
if (pmlmepriv->LinkDetectInfo.bBusyTraffic == _FALSE
|| rtw_to_roam(padapter) > 0
) {
u8 ssc_chk = rtw_sitesurvey_condition_check(padapter, _FALSE);
if ((ssc_chk == SS_ALLOW) || (ssc_chk == SS_DENY_BUSY_TRAFFIC)){
/* RTW_INFO(("rtw_do_join() when no desired bss in scanning queue\n"); */
ret = rtw_sitesurvey_cmd(padapter, &parm);
if (_SUCCESS != ret)
pmlmepriv->to_join = _FALSE;
} else {
/*if (ssc_chk == SS_DENY_BUDDY_UNDER_SURVEY) {
} else {*/
ret = _FAIL;
pmlmepriv->to_join = _FALSE;
}
} else {
ret = _FAIL;
pmlmepriv->to_join = _FALSE;
}
}
}
}
exit:
return ret;
}
u8 rtw_set_802_11_bssid(_adapter *padapter, u8 *bssid)
{
_irqL irqL;
u8 status = _SUCCESS;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
RTW_PRINT("set bssid:%pM\n", bssid);
if ((bssid[0] == 0x00 && bssid[1] == 0x00 && bssid[2] == 0x00 && bssid[3] == 0x00 && bssid[4] == 0x00 && bssid[5] == 0x00) ||
(bssid[0] == 0xFF && bssid[1] == 0xFF && bssid[2] == 0xFF && bssid[3] == 0xFF && bssid[4] == 0xFF && bssid[5] == 0xFF)) {
status = _FAIL;
goto exit;
}
_enter_critical_bh(&pmlmepriv->lock, &irqL);
RTW_INFO("Set BSSID under fw_state=0x%08x\n", get_fwstate(pmlmepriv));
if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE)
goto handle_tkip_countermeasure;
else if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE)
goto release_mlme_lock;
if (check_fwstate(pmlmepriv, _FW_LINKED | WIFI_ADHOC_MASTER_STATE) == _TRUE) {
if (_rtw_memcmp(&pmlmepriv->cur_network.network.MacAddress, bssid, ETH_ALEN) == _TRUE) {
if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _FALSE)
goto release_mlme_lock;/* it means driver is in WIFI_ADHOC_MASTER_STATE, we needn't create bss again. */
} else {
rtw_disassoc_cmd(padapter, 0, 0);
if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)
rtw_indicate_disconnect(padapter, 0, _FALSE);
rtw_free_assoc_resources_cmd(padapter, _TRUE, 0);
if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE)) {
_clr_fwstate_(pmlmepriv, WIFI_ADHOC_MASTER_STATE);
set_fwstate(pmlmepriv, WIFI_ADHOC_STATE);
}
}
}
handle_tkip_countermeasure:
if (rtw_handle_tkip_countermeasure(padapter, __func__) == _FAIL) {
status = _FAIL;
goto release_mlme_lock;
}
_rtw_memset(&pmlmepriv->assoc_ssid, 0, sizeof(NDIS_802_11_SSID));
_rtw_memcpy(&pmlmepriv->assoc_bssid, bssid, ETH_ALEN);
pmlmepriv->assoc_ch = 0;
pmlmepriv->assoc_by_bssid = _TRUE;
if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE)
pmlmepriv->to_join = _TRUE;
else
status = rtw_do_join(padapter);
release_mlme_lock:
_exit_critical_bh(&pmlmepriv->lock, &irqL);
exit:
return status;
}
u8 rtw_set_802_11_ssid(_adapter *padapter, NDIS_802_11_SSID *ssid)
{
_irqL irqL;
u8 status = _SUCCESS;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct wlan_network *pnetwork = &pmlmepriv->cur_network;
RTW_PRINT("set ssid [%s] fw_state=0x%08x\n",
ssid->Ssid, get_fwstate(pmlmepriv));
if (!rtw_is_hw_init_completed(padapter)) {
status = _FAIL;
goto exit;
}
_enter_critical_bh(&pmlmepriv->lock, &irqL);
RTW_INFO("Set SSID under fw_state=0x%08x\n", get_fwstate(pmlmepriv));
if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE)
goto handle_tkip_countermeasure;
else if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE)
goto release_mlme_lock;
if (check_fwstate(pmlmepriv, _FW_LINKED | WIFI_ADHOC_MASTER_STATE) == _TRUE) {
if ((pmlmepriv->assoc_ssid.SsidLength == ssid->SsidLength) &&
(_rtw_memcmp(&pmlmepriv->assoc_ssid.Ssid, ssid->Ssid, ssid->SsidLength) == _TRUE)) {
if ((check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _FALSE)) {
if (rtw_is_same_ibss(padapter, pnetwork) == _FALSE) {
/* if in WIFI_ADHOC_MASTER_STATE | WIFI_ADHOC_STATE, create bss or rejoin again */
rtw_disassoc_cmd(padapter, 0, 0);
if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)
rtw_indicate_disconnect(padapter, 0, _FALSE);
rtw_free_assoc_resources_cmd(padapter, _TRUE, 0);
if (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) {
_clr_fwstate_(pmlmepriv, WIFI_ADHOC_MASTER_STATE);
set_fwstate(pmlmepriv, WIFI_ADHOC_STATE);
}
} else {
goto release_mlme_lock;/* it means driver is in WIFI_ADHOC_MASTER_STATE, we needn't create bss again. */
}
}
#ifdef CONFIG_LPS
else
rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_JOINBSS, 0);
#endif
} else {
rtw_disassoc_cmd(padapter, 0, 0);
if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)
rtw_indicate_disconnect(padapter, 0, _FALSE);
rtw_free_assoc_resources_cmd(padapter, _TRUE, 0);
if (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) {
_clr_fwstate_(pmlmepriv, WIFI_ADHOC_MASTER_STATE);
set_fwstate(pmlmepriv, WIFI_ADHOC_STATE);
}
}
}
handle_tkip_countermeasure:
if (rtw_handle_tkip_countermeasure(padapter, __func__) == _FAIL) {
status = _FAIL;
goto release_mlme_lock;
}
if (rtw_validate_ssid(ssid) == _FALSE) {
status = _FAIL;
goto release_mlme_lock;
}
_rtw_memcpy(&pmlmepriv->assoc_ssid, ssid, sizeof(NDIS_802_11_SSID));
pmlmepriv->assoc_by_bssid = _FALSE;
if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE)
pmlmepriv->to_join = _TRUE;
else
status = rtw_do_join(padapter);
release_mlme_lock:
_exit_critical_bh(&pmlmepriv->lock, &irqL);
exit:
return status;
}
u8 rtw_set_802_11_connect(_adapter *padapter,
u8 *bssid, NDIS_802_11_SSID *ssid, u16 ch)
{
_irqL irqL;
u8 status = _SUCCESS;
bool bssid_valid = _TRUE;
bool ssid_valid = _TRUE;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
if (!ssid || rtw_validate_ssid(ssid) == _FALSE)
ssid_valid = _FALSE;
if (!bssid || rtw_validate_bssid(bssid) == _FALSE)
bssid_valid = _FALSE;
if (ssid_valid == _FALSE && bssid_valid == _FALSE) {
RTW_INFO(FUNC_ADPT_FMT" ssid:%p, ssid_valid:%d, bssid:%p, bssid_valid:%d\n",
FUNC_ADPT_ARG(padapter), ssid, ssid_valid, bssid, bssid_valid);
status = _FAIL;
goto exit;
}
if (!rtw_is_hw_init_completed(padapter)) {
status = _FAIL;
goto exit;
}
_enter_critical_bh(&pmlmepriv->lock, &irqL);
RTW_PRINT(FUNC_ADPT_FMT" fw_state=0x%08x\n",
FUNC_ADPT_ARG(padapter), get_fwstate(pmlmepriv));
if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE)
goto handle_tkip_countermeasure;
else if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE)
goto release_mlme_lock;
handle_tkip_countermeasure:
if (rtw_handle_tkip_countermeasure(padapter, __func__) == _FAIL) {
status = _FAIL;
goto release_mlme_lock;
}
if (ssid && ssid_valid)
_rtw_memcpy(&pmlmepriv->assoc_ssid, ssid, sizeof(NDIS_802_11_SSID));
else
_rtw_memset(&pmlmepriv->assoc_ssid, 0, sizeof(NDIS_802_11_SSID));
if (bssid && bssid_valid) {
_rtw_memcpy(&pmlmepriv->assoc_bssid, bssid, ETH_ALEN);
pmlmepriv->assoc_by_bssid = _TRUE;
} else
pmlmepriv->assoc_by_bssid = _FALSE;
pmlmepriv->assoc_ch = ch;
if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE)
pmlmepriv->to_join = _TRUE;
else
status = rtw_do_join(padapter);
release_mlme_lock:
_exit_critical_bh(&pmlmepriv->lock, &irqL);
exit:
return status;
}
u8 rtw_set_802_11_infrastructure_mode(_adapter *padapter,
NDIS_802_11_NETWORK_INFRASTRUCTURE networktype)
{
_irqL irqL;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct wlan_network *cur_network = &pmlmepriv->cur_network;
NDIS_802_11_NETWORK_INFRASTRUCTURE *pold_state = &(cur_network->network.InfrastructureMode);
u8 ap2sta_mode = _FALSE;
u8 ret = _TRUE;
if (*pold_state != networktype) {
/* RTW_INFO("change mode, old_mode=%d, new_mode=%d, fw_state=0x%x\n", *pold_state, networktype, get_fwstate(pmlmepriv)); */
if (*pold_state == Ndis802_11APMode
|| *pold_state == Ndis802_11_mesh
) {
/* change to other mode from Ndis802_11APMode/Ndis802_11_mesh */
cur_network->join_res = -1;
ap2sta_mode = _TRUE;
#ifdef CONFIG_NATIVEAP_MLME
stop_ap_mode(padapter);
#endif
}
_enter_critical_bh(&pmlmepriv->lock, &irqL);
if ((check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) || (*pold_state == Ndis802_11IBSS))
rtw_disassoc_cmd(padapter, 0, 0);
if ((check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ||
(check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE))
rtw_free_assoc_resources_cmd(padapter, _TRUE, 0);
if ((*pold_state == Ndis802_11Infrastructure) || (*pold_state == Ndis802_11IBSS)) {
if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) {
rtw_indicate_disconnect(padapter, 0, _FALSE); /*will clr Linked_state; before this function, we must have checked whether issue dis-assoc_cmd or not*/
}
}
*pold_state = networktype;
_clr_fwstate_(pmlmepriv, ~WIFI_NULL_STATE);
switch (networktype) {
case Ndis802_11IBSS:
set_fwstate(pmlmepriv, WIFI_ADHOC_STATE);
break;
case Ndis802_11Infrastructure:
set_fwstate(pmlmepriv, WIFI_STATION_STATE);
if (ap2sta_mode)
rtw_init_bcmc_stainfo(padapter);
break;
case Ndis802_11APMode:
set_fwstate(pmlmepriv, WIFI_AP_STATE);
#ifdef CONFIG_NATIVEAP_MLME
start_ap_mode(padapter);
/* rtw_indicate_connect(padapter); */
#endif
break;
#ifdef CONFIG_RTW_MESH
case Ndis802_11_mesh:
set_fwstate(pmlmepriv, WIFI_MESH_STATE);
start_ap_mode(padapter);
break;
#endif
case Ndis802_11AutoUnknown:
case Ndis802_11InfrastructureMax:
break;
case Ndis802_11Monitor:
set_fwstate(pmlmepriv, WIFI_MONITOR_STATE);
break;
default:
ret = _FALSE;
rtw_warn_on(1);
}
/* SecClearAllKeys(adapter); */
_exit_critical_bh(&pmlmepriv->lock, &irqL);
}
return ret;
}
u8 rtw_set_802_11_disassociate(_adapter *padapter)
{
_irqL irqL;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
_enter_critical_bh(&pmlmepriv->lock, &irqL);
if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) {
rtw_disassoc_cmd(padapter, 0, 0);
rtw_indicate_disconnect(padapter, 0, _FALSE);
/* modify for CONFIG_IEEE80211W, none 11w can use it */
rtw_free_assoc_resources_cmd(padapter, _TRUE, 0);
if (_FAIL == rtw_pwr_wakeup(padapter))
RTW_INFO("%s(): rtw_pwr_wakeup fail !!!\n", __FUNCTION__);
}
_exit_critical_bh(&pmlmepriv->lock, &irqL);
return _TRUE;
}
#if 1
u8 rtw_set_802_11_bssid_list_scan(_adapter *padapter, struct sitesurvey_parm *pparm)
{
_irqL irqL;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
u8 res = _TRUE;
_enter_critical_bh(&pmlmepriv->lock, &irqL);
res = rtw_sitesurvey_cmd(padapter, pparm);
_exit_critical_bh(&pmlmepriv->lock, &irqL);
return res;
}
#else
u8 rtw_set_802_11_bssid_list_scan(_adapter *padapter, struct sitesurvey_parm *pparm)
{
_irqL irqL;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
u8 res = _TRUE;
if (padapter == NULL) {
res = _FALSE;
goto exit;
}
if (!rtw_is_hw_init_completed(padapter)) {
res = _FALSE;
goto exit;
}
if ((check_fwstate(pmlmepriv, _FW_UNDER_SURVEY | _FW_UNDER_LINKING) == _TRUE) ||
(pmlmepriv->LinkDetectInfo.bBusyTraffic == _TRUE)) {
/* Scan or linking is in progress, do nothing. */
res = _TRUE;
} else {
if (rtw_is_scan_deny(padapter)) {
RTW_INFO(FUNC_ADPT_FMT": scan deny\n", FUNC_ADPT_ARG(padapter));
indicate_wx_scan_complete_event(padapter);
return _SUCCESS;
}
_enter_critical_bh(&pmlmepriv->lock, &irqL);
res = rtw_sitesurvey_cmd(padapter, pparm);
_exit_critical_bh(&pmlmepriv->lock, &irqL);
}
exit:
return res;
}
#endif
u8 rtw_set_802_11_authentication_mode(_adapter *padapter, NDIS_802_11_AUTHENTICATION_MODE authmode)
{
struct security_priv *psecuritypriv = &padapter->securitypriv;
int res;
u8 ret;
psecuritypriv->ndisauthtype = authmode;
if (psecuritypriv->ndisauthtype > 3)
psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X;
#ifdef CONFIG_WAPI_SUPPORT
if (psecuritypriv->ndisauthtype == 6)
psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_WAPI;
#endif
res = rtw_set_auth(padapter, psecuritypriv);
if (res == _SUCCESS)
ret = _TRUE;
else
ret = _FALSE;
return ret;
}
u8 rtw_set_802_11_add_wep(_adapter *padapter, NDIS_802_11_WEP *wep)
{
u8 bdefaultkey;
u8 btransmitkey;
sint keyid, res;
struct security_priv *psecuritypriv = &(padapter->securitypriv);
u8 ret = _SUCCESS;
bdefaultkey = (wep->KeyIndex & 0x40000000) > 0 ? _FALSE : _TRUE; /* for ??? */
btransmitkey = (wep->KeyIndex & 0x80000000) > 0 ? _TRUE : _FALSE; /* for ??? */
keyid = wep->KeyIndex & 0x3fffffff;
if (keyid >= 4) {
ret = _FALSE;
goto exit;
}
switch (wep->KeyLength) {
case 5:
psecuritypriv->dot11PrivacyAlgrthm = _WEP40_;
break;
case 13:
psecuritypriv->dot11PrivacyAlgrthm = _WEP104_;
break;
default:
psecuritypriv->dot11PrivacyAlgrthm = _NO_PRIVACY_;
break;
}
_rtw_memcpy(&(psecuritypriv->dot11DefKey[keyid].skey[0]), &(wep->KeyMaterial), wep->KeyLength);
psecuritypriv->dot11DefKeylen[keyid] = wep->KeyLength;
psecuritypriv->dot11PrivacyKeyIndex = keyid;
res = rtw_set_key(padapter, psecuritypriv, keyid, 1, _TRUE);
if (res == _FAIL)
ret = _FALSE;
exit:
return ret;
}
/*
* rtw_get_cur_max_rate -
* @adapter: pointer to _adapter structure
*
* Return 0 or 100Kbps
*/
u16 rtw_get_cur_max_rate(_adapter *adapter)
{
int j;
int i = 0;
u16 rate = 0, max_rate = 0;
struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
WLAN_BSSID_EX *pcur_bss = &pmlmepriv->cur_network.network;
int sta_bssrate_len = 0;
unsigned char sta_bssrate[NumRates];
struct sta_info *psta = NULL;
u8 short_GI = 0;
#ifdef CONFIG_80211N_HT
u8 rf_type = 0;
#endif
#ifdef CONFIG_MP_INCLUDED
if (adapter->registrypriv.mp_mode == 1) {
if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE)
return 0;
}
#endif
if ((check_fwstate(pmlmepriv, _FW_LINKED) != _TRUE)
&& (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) != _TRUE))
return 0;
psta = rtw_get_stainfo(&adapter->stapriv, get_bssid(pmlmepriv));
if (psta == NULL)
return 0;
short_GI = query_ra_short_GI(psta, rtw_get_tx_bw_mode(adapter, psta));
#ifdef CONFIG_80211N_HT
if (is_supported_ht(psta->wireless_mode)) {
rtw_hal_get_hwreg(adapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
max_rate = rtw_mcs_rate(rf_type
, (psta->cmn.bw_mode == CHANNEL_WIDTH_40) ? 1 : 0
, short_GI
, psta->htpriv.ht_cap.supp_mcs_set
);
}
#ifdef CONFIG_80211AC_VHT
else if (is_supported_vht(psta->wireless_mode))
max_rate = ((rtw_vht_mcs_to_data_rate(psta->cmn.bw_mode, short_GI, pmlmepriv->vhtpriv.vht_highest_rate) + 1) >> 1) * 10;
#endif /* CONFIG_80211AC_VHT */
else
#endif /* CONFIG_80211N_HT */
{
/*station mode show :station && ap support rate; softap :show ap support rate*/
if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE)
get_rate_set(adapter, sta_bssrate, &sta_bssrate_len);/*get sta rate and length*/
while ((pcur_bss->SupportedRates[i] != 0) && (pcur_bss->SupportedRates[i] != 0xFF)) {
rate = pcur_bss->SupportedRates[i] & 0x7F;/*AP support rates*/
/*RTW_INFO("%s rate=%02X \n", __func__, rate);*/
/*check STA support rate or not */
if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) {
for (j = 0; j < sta_bssrate_len; j++) {
/* Avoid the proprietary data rate (22Mbps) of Handlink WSG-4000 AP */
if ((rate | IEEE80211_BASIC_RATE_MASK)
== (sta_bssrate[j] | IEEE80211_BASIC_RATE_MASK)) {
if (rate > max_rate) {
max_rate = rate;
}
break;
}
}
} else {
if (rate > max_rate)
max_rate = rate;
}
i++;
}
max_rate = max_rate * 10 / 2;
}
return max_rate;
}
/*
* rtw_set_scan_mode -
* @adapter: pointer to _adapter structure
* @scan_mode:
*
* Return _SUCCESS or _FAIL
*/
int rtw_set_scan_mode(_adapter *adapter, RT_SCAN_TYPE scan_mode)
{
if (scan_mode != SCAN_ACTIVE && scan_mode != SCAN_PASSIVE)
return _FAIL;
adapter->mlmepriv.scan_mode = scan_mode;
return _SUCCESS;
}
/*
* rtw_set_channel_plan -
* @adapter: pointer to _adapter structure
* @channel_plan:
*
* Return _SUCCESS or _FAIL
*/
int rtw_set_channel_plan(_adapter *adapter, u8 channel_plan)
{
/* handle by cmd_thread to sync with scan operation */
return rtw_set_chplan_cmd(adapter, RTW_CMDF_WAIT_ACK, channel_plan, 1);
}
/*
* rtw_set_country -
* @adapter: pointer to _adapter structure
* @country_code: string of country code
*
* Return _SUCCESS or _FAIL
*/
int rtw_set_country(_adapter *adapter, const char *country_code)
{
#ifdef CONFIG_RTW_IOCTL_SET_COUNTRY
return rtw_set_country_cmd(adapter, RTW_CMDF_WAIT_ACK, country_code, 1);
#else
RTW_INFO("%s(): not applied\n", __func__);
return _SUCCESS;
#endif
}
/*
* rtw_set_band -
* @adapter: pointer to _adapter structure
* @band: band to set
*
* Return _SUCCESS or _FAIL
*/
int rtw_set_band(_adapter *adapter, u8 band)
{
if (rtw_band_valid(band)) {
RTW_INFO(FUNC_ADPT_FMT" band:%d\n", FUNC_ADPT_ARG(adapter), band);
adapter->setband = band;
return _SUCCESS;
}
RTW_PRINT(FUNC_ADPT_FMT" band:%d fail\n", FUNC_ADPT_ARG(adapter), band);
return _FAIL;
}

388
core/rtw_iol.c Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#include <drv_types.h>
#ifdef CONFIG_IOL
struct xmit_frame *rtw_IOL_accquire_xmit_frame(ADAPTER *adapter)
{
struct xmit_frame *xmit_frame;
struct xmit_buf *xmitbuf;
struct pkt_attrib *pattrib;
struct xmit_priv *pxmitpriv = &(adapter->xmitpriv);
#if 1
xmit_frame = rtw_alloc_xmitframe(pxmitpriv);
if (xmit_frame == NULL) {
RTW_INFO("%s rtw_alloc_xmitframe return null\n", __FUNCTION__);
goto exit;
}
xmitbuf = rtw_alloc_xmitbuf(pxmitpriv);
if (xmitbuf == NULL) {
RTW_INFO("%s rtw_alloc_xmitbuf return null\n", __FUNCTION__);
rtw_free_xmitframe(pxmitpriv, xmit_frame);
xmit_frame = NULL;
goto exit;
}
xmit_frame->frame_tag = MGNT_FRAMETAG;
xmit_frame->pxmitbuf = xmitbuf;
xmit_frame->buf_addr = xmitbuf->pbuf;
xmitbuf->priv_data = xmit_frame;
pattrib = &xmit_frame->attrib;
update_mgntframe_attrib(adapter, pattrib);
pattrib->qsel = QSLT_BEACON;/* Beacon */
pattrib->subtype = WIFI_BEACON;
pattrib->pktlen = pattrib->last_txcmdsz = 0;
#else
xmit_frame = alloc_mgtxmitframe(pxmitpriv);
if (xmit_frame == NULL)
RTW_INFO("%s alloc_mgtxmitframe return null\n", __FUNCTION__);
else {
pattrib = &xmit_frame->attrib;
update_mgntframe_attrib(adapter, pattrib);
pattrib->qsel = QSLT_BEACON;
pattrib->pktlen = pattrib->last_txcmdsz = 0;
}
#endif
exit:
return xmit_frame;
}
int rtw_IOL_append_cmds(struct xmit_frame *xmit_frame, u8 *IOL_cmds, u32 cmd_len)
{
struct pkt_attrib *pattrib = &xmit_frame->attrib;
u16 buf_offset;
u32 ori_len;
buf_offset = TXDESC_OFFSET;
ori_len = buf_offset + pattrib->pktlen;
/* check if the io_buf can accommodate new cmds */
if (ori_len + cmd_len + 8 > MAX_XMITBUF_SZ) {
RTW_INFO("%s %u is large than MAX_XMITBUF_SZ:%u, can't accommodate new cmds\n", __FUNCTION__
, ori_len + cmd_len + 8, MAX_XMITBUF_SZ);
return _FAIL;
}
_rtw_memcpy(xmit_frame->buf_addr + buf_offset + pattrib->pktlen, IOL_cmds, cmd_len);
pattrib->pktlen += cmd_len;
pattrib->last_txcmdsz += cmd_len;
/* RTW_INFO("%s ori:%u + cmd_len:%u = %u\n", __FUNCTION__, ori_len, cmd_len, buf_offset+pattrib->pktlen); */
return _SUCCESS;
}
bool rtw_IOL_applied(ADAPTER *adapter)
{
if (1 == adapter->registrypriv.fw_iol)
return _TRUE;
#ifdef CONFIG_USB_HCI
if ((2 == adapter->registrypriv.fw_iol) && (IS_FULL_SPEED_USB(adapter)))
return _TRUE;
#endif
return _FALSE;
}
int rtw_IOL_exec_cmds_sync(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms, u32 bndy_cnt)
{
return rtw_hal_iol_cmd(adapter, xmit_frame, max_wating_ms, bndy_cnt);
}
#ifdef CONFIG_IOL_NEW_GENERATION
int rtw_IOL_append_LLT_cmd(struct xmit_frame *xmit_frame, u8 page_boundary)
{
return _SUCCESS;
}
int _rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value, u8 mask)
{
struct ioreg_cfg cmd = {8, IOREG_CMD_WB_REG, 0x0, 0x0, 0x0};
/* RTW_PUT_LE16((u8*)&cmd.address, addr); */
/* RTW_PUT_LE32((u8*)&cmd.value, (u32)value); */
cmd.address = cpu_to_le16(addr);
cmd.data = cpu_to_le32(value);
if (mask != 0xFF) {
cmd.length = 12;
/* RTW_PUT_LE32((u8*)&cmd.mask, (u32)mask); */
cmd.mask = cpu_to_le32(mask);
}
/* RTW_INFO("%s addr:0x%04x,value:0x%08x,mask:0x%08x\n", __FUNCTION__, addr,value,mask); */
return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, cmd.length);
}
int _rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value, u16 mask)
{
struct ioreg_cfg cmd = {8, IOREG_CMD_WW_REG, 0x0, 0x0, 0x0};
/* RTW_PUT_LE16((u8*)&cmd.address, addr); */
/* RTW_PUT_LE32((u8*)&cmd.value, (u32)value); */
cmd.address = cpu_to_le16(addr);
cmd.data = cpu_to_le32(value);
if (mask != 0xFFFF) {
cmd.length = 12;
/* RTW_PUT_LE32((u8*)&cmd.mask, (u32)mask); */
cmd.mask = cpu_to_le32(mask);
}
/* RTW_INFO("%s addr:0x%04x,value:0x%08x,mask:0x%08x\n", __FUNCTION__, addr,value,mask); */
return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, cmd.length);
}
int _rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value, u32 mask)
{
struct ioreg_cfg cmd = {8, IOREG_CMD_WD_REG, 0x0, 0x0, 0x0};
/* RTW_PUT_LE16((u8*)&cmd.address, addr); */
/* RTW_PUT_LE32((u8*)&cmd.value, (u32)value); */
cmd.address = cpu_to_le16(addr);
cmd.data = cpu_to_le32(value);
if (mask != 0xFFFFFFFF) {
cmd.length = 12;
/* RTW_PUT_LE32((u8*)&cmd.mask, (u32)mask); */
cmd.mask = cpu_to_le32(mask);
}
/* RTW_INFO("%s addr:0x%04x,value:0x%08x,mask:0x%08x\n", __FU2NCTION__, addr,value,mask); */
return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, cmd.length);
}
int _rtw_IOL_append_WRF_cmd(struct xmit_frame *xmit_frame, u8 rf_path, u16 addr, u32 value, u32 mask)
{
struct ioreg_cfg cmd = {8, IOREG_CMD_W_RF, 0x0, 0x0, 0x0};
/* RTW_PUT_LE16((u8*)&cmd.address, addr); */
/* RTW_PUT_LE32((u8*)&cmd.value, (u32)value); */
cmd.address = (rf_path << 8) | ((addr) & 0xFF);
cmd.data = cpu_to_le32(value);
if (mask != 0x000FFFFF) {
cmd.length = 12;
/* RTW_PUT_LE32((u8*)&cmd.mask, (u32)mask); */
cmd.mask = cpu_to_le32(mask);
}
/* RTW_INFO("%s rf_path:0x%02x addr:0x%04x,value:0x%08x,mask:0x%08x\n", __FU2NCTION__,rf_path, addr,value,mask); */
return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, cmd.length);
}
int rtw_IOL_append_DELAY_US_cmd(struct xmit_frame *xmit_frame, u16 us)
{
struct ioreg_cfg cmd = {4, IOREG_CMD_DELAY_US, 0x0, 0x0, 0x0};
/* RTW_PUT_LE16((u8*)&cmd.address, us); */
cmd.address = cpu_to_le16(us);
/* RTW_INFO("%s %u\n", __FUNCTION__, us); */
return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, 4);
}
int rtw_IOL_append_DELAY_MS_cmd(struct xmit_frame *xmit_frame, u16 ms)
{
struct ioreg_cfg cmd = {4, IOREG_CMD_DELAY_US, 0x0, 0x0, 0x0};
/* RTW_PUT_LE16((u8*)&cmd.address, ms); */
cmd.address = cpu_to_le16(ms);
/* RTW_INFO("%s %u\n", __FUNCTION__, ms); */
return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, 4);
}
int rtw_IOL_append_END_cmd(struct xmit_frame *xmit_frame)
{
struct ioreg_cfg cmd = {4, IOREG_CMD_END, 0xFFFF, 0xFF, 0x0};
return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, 4);
}
u8 rtw_IOL_cmd_boundary_handle(struct xmit_frame *pxmit_frame)
{
u8 is_cmd_bndy = _FALSE;
if (((pxmit_frame->attrib.pktlen + 32) % 256) + 8 >= 256) {
rtw_IOL_append_END_cmd(pxmit_frame);
pxmit_frame->attrib.pktlen = ((((pxmit_frame->attrib.pktlen + 32) / 256) + 1) * 256);
/* printk("==> %s, pktlen(%d)\n",__FUNCTION__,pxmit_frame->attrib.pktlen); */
pxmit_frame->attrib.last_txcmdsz = pxmit_frame->attrib.pktlen;
is_cmd_bndy = _TRUE;
}
return is_cmd_bndy;
}
void rtw_IOL_cmd_buf_dump(ADAPTER *Adapter, int buf_len, u8 *pbuf)
{
int i;
int j = 1;
printk("###### %s ######\n", __FUNCTION__);
for (i = 0; i < buf_len; i++) {
printk("%02x-", *(pbuf + i));
if (j % 32 == 0)
printk("\n");
j++;
}
printk("\n");
printk("============= ioreg_cmd len = %d ===============\n", buf_len);
}
#else /* CONFIG_IOL_NEW_GENERATION */
int rtw_IOL_append_LLT_cmd(struct xmit_frame *xmit_frame, u8 page_boundary)
{
IOL_CMD cmd = {0x0, IOL_CMD_LLT, 0x0, 0x0};
RTW_PUT_BE32((u8 *)&cmd.value, (u32)page_boundary);
return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, 8);
}
int _rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value)
{
IOL_CMD cmd = {0x0, IOL_CMD_WB_REG, 0x0, 0x0};
RTW_PUT_BE16((u8 *)&cmd.address, (u16)addr);
RTW_PUT_BE32((u8 *)&cmd.value, (u32)value);
return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, 8);
}
int _rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value)
{
IOL_CMD cmd = {0x0, IOL_CMD_WW_REG, 0x0, 0x0};
RTW_PUT_BE16((u8 *)&cmd.address, (u16)addr);
RTW_PUT_BE32((u8 *)&cmd.value, (u32)value);
return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, 8);
}
int _rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value)
{
IOL_CMD cmd = {0x0, IOL_CMD_WD_REG, 0x0, 0x0};
u8 *pos = (u8 *)&cmd;
RTW_PUT_BE16((u8 *)&cmd.address, (u16)addr);
RTW_PUT_BE32((u8 *)&cmd.value, (u32)value);
return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, 8);
}
#ifdef DBG_IO
int dbg_rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value, const char *caller, const int line)
{
if (match_write_sniff(xmit_frame->padapter, addr, 1, value)) {
RTW_INFO("DBG_IO %s:%d IOL_WB(0x%04x, 0x%02x)\n"
, caller, line, addr, value);
}
return _rtw_IOL_append_WB_cmd(xmit_frame, addr, value);
}
int dbg_rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value, const char *caller, const int line)
{
if (match_write_sniff(xmit_frame->padapter, addr, 2, value)) {
RTW_INFO("DBG_IO %s:%d IOL_WW(0x%04x, 0x%04x)\n"
, caller, line, addr, value);
}
return _rtw_IOL_append_WW_cmd(xmit_frame, addr, value);
}
int dbg_rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value, const char *caller, const int line)
{
if (match_write_sniff(xmit_frame->padapter, addr, 4, value)) {
RTW_INFO("DBG_IO %s:%d IOL_WD(0x%04x, 0x%08x)\n"
, caller, line, addr, value);
}
return _rtw_IOL_append_WD_cmd(xmit_frame, addr, value);
}
#endif
int rtw_IOL_append_DELAY_US_cmd(struct xmit_frame *xmit_frame, u16 us)
{
IOL_CMD cmd = {0x0, IOL_CMD_DELAY_US, 0x0, 0x0};
RTW_PUT_BE32((u8 *)&cmd.value, (u32)us);
/* RTW_INFO("%s %u\n", __FUNCTION__, us); */
return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, 8);
}
int rtw_IOL_append_DELAY_MS_cmd(struct xmit_frame *xmit_frame, u16 ms)
{
IOL_CMD cmd = {0x0, IOL_CMD_DELAY_MS, 0x0, 0x0};
RTW_PUT_BE32((u8 *)&cmd.value, (u32)ms);
/* RTW_INFO("%s %u\n", __FUNCTION__, ms); */
return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, 8);
}
int rtw_IOL_append_END_cmd(struct xmit_frame *xmit_frame)
{
IOL_CMD end_cmd = {0x0, IOL_CMD_END, 0x0, 0x0};
return rtw_IOL_append_cmds(xmit_frame, (u8 *)&end_cmd, 8);
}
int rtw_IOL_exec_cmd_array_sync(PADAPTER adapter, u8 *IOL_cmds, u32 cmd_num, u32 max_wating_ms)
{
struct xmit_frame *xmit_frame;
xmit_frame = rtw_IOL_accquire_xmit_frame(adapter);
if (xmit_frame == NULL)
return _FAIL;
if (rtw_IOL_append_cmds(xmit_frame, IOL_cmds, cmd_num << 3) == _FAIL)
return _FAIL;
return rtw_IOL_exec_cmds_sync(adapter, xmit_frame, max_wating_ms, 0);
}
int rtw_IOL_exec_empty_cmds_sync(ADAPTER *adapter, u32 max_wating_ms)
{
IOL_CMD end_cmd = {0x0, IOL_CMD_END, 0x0, 0x0};
return rtw_IOL_exec_cmd_array_sync(adapter, (u8 *)&end_cmd, 1, max_wating_ms);
}
#endif /* CONFIG_IOL_NEW_GENERATION */
#endif /* CONFIG_IOL */

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core/rtw_mem.c Normal file
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/******************************************************************************
*
* Copyright(c) 2016 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#include <drv_types.h>
#include <rtw_mem.h>
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("Realtek Wireless Lan Driver");
MODULE_AUTHOR("Realtek Semiconductor Corp.");
MODULE_VERSION("DRIVERVERSION");
struct sk_buff_head rtk_skb_mem_q;
struct u8 *rtk_buf_mem[NR_RECVBUFF];
struct u8 *rtw_get_buf_premem(int index)
{
printk("%s, rtk_buf_mem index : %d\n", __func__, index);
return rtk_buf_mem[index];
}
u16 rtw_rtkm_get_buff_size(void)
{
return MAX_RTKM_RECVBUF_SZ;
}
EXPORT_SYMBOL(rtw_rtkm_get_buff_size);
u8 rtw_rtkm_get_nr_recv_skb(void)
{
return MAX_RTKM_NR_PREALLOC_RECV_SKB;
}
EXPORT_SYMBOL(rtw_rtkm_get_nr_recv_skb);
struct sk_buff *rtw_alloc_skb_premem(u16 in_size)
{
struct sk_buff *skb = NULL;
if (in_size > MAX_RTKM_RECVBUF_SZ) {
pr_info("warning %s: driver buffer size(%d) > rtkm buffer size(%d)\n", __func__, in_size, MAX_RTKM_RECVBUF_SZ);
WARN_ON(1);
return skb;
}
skb = skb_dequeue(&rtk_skb_mem_q);
printk("%s, rtk_skb_mem_q len : %d\n", __func__, skb_queue_len(&rtk_skb_mem_q));
return skb;
}
EXPORT_SYMBOL(rtw_alloc_skb_premem);
int rtw_free_skb_premem(struct sk_buff *pskb)
{
if (!pskb)
return -1;
if (skb_queue_len(&rtk_skb_mem_q) >= MAX_RTKM_NR_PREALLOC_RECV_SKB)
return -1;
skb_queue_tail(&rtk_skb_mem_q, pskb);
printk("%s, rtk_skb_mem_q len : %d\n", __func__, skb_queue_len(&rtk_skb_mem_q));
return 0;
}
EXPORT_SYMBOL(rtw_free_skb_premem);
static int __init rtw_mem_init(void)
{
int i;
SIZE_PTR tmpaddr = 0;
SIZE_PTR alignment = 0;
struct sk_buff *pskb = NULL;
printk("%s\n", __func__);
pr_info("MAX_RTKM_NR_PREALLOC_RECV_SKB: %d\n", MAX_RTKM_NR_PREALLOC_RECV_SKB);
pr_info("MAX_RTKM_RECVBUF_SZ: %d\n", MAX_RTKM_RECVBUF_SZ);
#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX
for (i = 0; i < NR_RECVBUFF; i++)
rtk_buf_mem[i] = usb_buffer_alloc(dev, size, (in_interrupt() ? GFP_ATOMIC : GFP_KERNEL), dma);
#endif /* CONFIG_USE_USB_BUFFER_ALLOC_RX */
skb_queue_head_init(&rtk_skb_mem_q);
for (i = 0; i < MAX_RTKM_NR_PREALLOC_RECV_SKB; i++) {
pskb = __dev_alloc_skb(MAX_RTKM_RECVBUF_SZ + RECVBUFF_ALIGN_SZ, in_interrupt() ? GFP_ATOMIC : GFP_KERNEL);
if (pskb) {
tmpaddr = (SIZE_PTR)pskb->data;
alignment = tmpaddr & (RECVBUFF_ALIGN_SZ - 1);
skb_reserve(pskb, (RECVBUFF_ALIGN_SZ - alignment));
skb_queue_tail(&rtk_skb_mem_q, pskb);
} else
printk("%s, alloc skb memory fail!\n", __func__);
pskb = NULL;
}
printk("%s, rtk_skb_mem_q len : %d\n", __func__, skb_queue_len(&rtk_skb_mem_q));
return 0;
}
static void __exit rtw_mem_exit(void)
{
if (skb_queue_len(&rtk_skb_mem_q))
printk("%s, rtk_skb_mem_q len : %d\n", __func__, skb_queue_len(&rtk_skb_mem_q));
skb_queue_purge(&rtk_skb_mem_q);
printk("%s\n", __func__);
}
module_init(rtw_mem_init);
module_exit(rtw_mem_exit);

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5293
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16801
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3889
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/******************************************************************************
*
* Copyright(c) 2013 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#include <rtw_odm.h>
#include <hal_data.h>
u32 rtw_phydm_ability_ops(_adapter *adapter, HAL_PHYDM_OPS ops, u32 ability)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter);
struct dm_struct *podmpriv = &pHalData->odmpriv;
u32 result = 0;
switch (ops) {
case HAL_PHYDM_DIS_ALL_FUNC:
podmpriv->support_ability = DYNAMIC_FUNC_DISABLE;
halrf_cmn_info_set(podmpriv, HALRF_CMNINFO_ABILITY, DYNAMIC_FUNC_DISABLE);
break;
case HAL_PHYDM_FUNC_SET:
podmpriv->support_ability |= ability;
break;
case HAL_PHYDM_FUNC_CLR:
podmpriv->support_ability &= ~(ability);
break;
case HAL_PHYDM_ABILITY_BK:
/* dm flag backup*/
podmpriv->bk_support_ability = podmpriv->support_ability;
pHalData->bk_rf_ability = halrf_cmn_info_get(podmpriv, HALRF_CMNINFO_ABILITY);
break;
case HAL_PHYDM_ABILITY_RESTORE:
/* restore dm flag */
podmpriv->support_ability = podmpriv->bk_support_ability;
halrf_cmn_info_set(podmpriv, HALRF_CMNINFO_ABILITY, pHalData->bk_rf_ability);
break;
case HAL_PHYDM_ABILITY_SET:
podmpriv->support_ability = ability;
break;
case HAL_PHYDM_ABILITY_GET:
result = podmpriv->support_ability;
break;
}
return result;
}
/* set ODM_CMNINFO_IC_TYPE based on chip_type */
void rtw_odm_init_ic_type(_adapter *adapter)
{
struct dm_struct *odm = adapter_to_phydm(adapter);
u32 ic_type = chip_type_to_odm_ic_type(rtw_get_chip_type(adapter));
rtw_warn_on(!ic_type);
odm_cmn_info_init(odm, ODM_CMNINFO_IC_TYPE, ic_type);
}
void rtw_odm_adaptivity_ver_msg(void *sel, _adapter *adapter)
{
RTW_PRINT_SEL(sel, "ADAPTIVITY_VERSION "ADAPTIVITY_VERSION"\n");
}
#define RTW_ADAPTIVITY_EN_DISABLE 0
#define RTW_ADAPTIVITY_EN_ENABLE 1
void rtw_odm_adaptivity_en_msg(void *sel, _adapter *adapter)
{
struct registry_priv *regsty = &adapter->registrypriv;
RTW_PRINT_SEL(sel, "RTW_ADAPTIVITY_EN_");
if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_DISABLE)
_RTW_PRINT_SEL(sel, "DISABLE\n");
else if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_ENABLE)
_RTW_PRINT_SEL(sel, "ENABLE\n");
else
_RTW_PRINT_SEL(sel, "INVALID\n");
}
#define RTW_ADAPTIVITY_MODE_NORMAL 0
#define RTW_ADAPTIVITY_MODE_CARRIER_SENSE 1
void rtw_odm_adaptivity_mode_msg(void *sel, _adapter *adapter)
{
struct registry_priv *regsty = &adapter->registrypriv;
RTW_PRINT_SEL(sel, "RTW_ADAPTIVITY_MODE_");
if (regsty->adaptivity_mode == RTW_ADAPTIVITY_MODE_NORMAL)
_RTW_PRINT_SEL(sel, "NORMAL\n");
else if (regsty->adaptivity_mode == RTW_ADAPTIVITY_MODE_CARRIER_SENSE)
_RTW_PRINT_SEL(sel, "CARRIER_SENSE\n");
else
_RTW_PRINT_SEL(sel, "INVALID\n");
}
void rtw_odm_adaptivity_config_msg(void *sel, _adapter *adapter)
{
rtw_odm_adaptivity_ver_msg(sel, adapter);
rtw_odm_adaptivity_en_msg(sel, adapter);
rtw_odm_adaptivity_mode_msg(sel, adapter);
}
bool rtw_odm_adaptivity_needed(_adapter *adapter)
{
struct registry_priv *regsty = &adapter->registrypriv;
bool ret = _FALSE;
if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_ENABLE)
ret = _TRUE;
return ret;
}
void rtw_odm_adaptivity_parm_msg(void *sel, _adapter *adapter)
{
struct dm_struct *odm = adapter_to_phydm(adapter);
rtw_odm_adaptivity_config_msg(sel, adapter);
RTW_PRINT_SEL(sel, "%10s %16s\n"
, "th_l2h_ini", "th_edcca_hl_diff");
RTW_PRINT_SEL(sel, "0x%-8x %-16d\n"
, (u8)odm->th_l2h_ini
, odm->th_edcca_hl_diff
);
}
void rtw_odm_adaptivity_parm_set(_adapter *adapter, s8 th_l2h_ini, s8 th_edcca_hl_diff)
{
struct dm_struct *odm = adapter_to_phydm(adapter);
odm->th_l2h_ini = th_l2h_ini;
odm->th_edcca_hl_diff = th_edcca_hl_diff;
}
void rtw_odm_get_perpkt_rssi(void *sel, _adapter *adapter)
{
struct dm_struct *odm = adapter_to_phydm(adapter);
RTW_PRINT_SEL(sel, "rx_rate = %s, rssi_a = %d(%%), rssi_b = %d(%%)\n",
HDATA_RATE(odm->rx_rate), odm->rssi_a, odm->rssi_b);
}
void rtw_odm_acquirespinlock(_adapter *adapter, enum rt_spinlock_type type)
{
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(adapter);
_irqL irqL;
switch (type) {
case RT_IQK_SPINLOCK:
_enter_critical_bh(&pHalData->IQKSpinLock, &irqL);
default:
break;
}
}
void rtw_odm_releasespinlock(_adapter *adapter, enum rt_spinlock_type type)
{
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(adapter);
_irqL irqL;
switch (type) {
case RT_IQK_SPINLOCK:
_exit_critical_bh(&pHalData->IQKSpinLock, &irqL);
default:
break;
}
}
inline u8 rtw_odm_get_dfs_domain(struct dvobj_priv *dvobj)
{
#ifdef CONFIG_DFS_MASTER
struct dm_struct *pDM_Odm = dvobj_to_phydm(dvobj);
return pDM_Odm->dfs_region_domain;
#else
return PHYDM_DFS_DOMAIN_UNKNOWN;
#endif
}
inline u8 rtw_odm_dfs_domain_unknown(struct dvobj_priv *dvobj)
{
#ifdef CONFIG_DFS_MASTER
return rtw_odm_get_dfs_domain(dvobj) == PHYDM_DFS_DOMAIN_UNKNOWN;
#else
return 1;
#endif
}
#ifdef CONFIG_DFS_MASTER
inline void rtw_odm_radar_detect_reset(_adapter *adapter)
{
phydm_radar_detect_reset(adapter_to_phydm(adapter));
}
inline void rtw_odm_radar_detect_disable(_adapter *adapter)
{
phydm_radar_detect_disable(adapter_to_phydm(adapter));
}
/* called after ch, bw is set */
inline void rtw_odm_radar_detect_enable(_adapter *adapter)
{
phydm_radar_detect_enable(adapter_to_phydm(adapter));
}
inline BOOLEAN rtw_odm_radar_detect(_adapter *adapter)
{
return phydm_radar_detect(adapter_to_phydm(adapter));
}
inline u8 rtw_odm_radar_detect_polling_int_ms(struct dvobj_priv *dvobj)
{
return phydm_dfs_polling_time(dvobj_to_phydm(dvobj));
}
#endif /* CONFIG_DFS_MASTER */
void rtw_odm_parse_rx_phy_status_chinfo(union recv_frame *rframe, u8 *phys)
{
#ifndef DBG_RX_PHYSTATUS_CHINFO
#define DBG_RX_PHYSTATUS_CHINFO 0
#endif
#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1)
_adapter *adapter = rframe->u.hdr.adapter;
struct dm_struct *phydm = adapter_to_phydm(adapter);
struct rx_pkt_attrib *attrib = &rframe->u.hdr.attrib;
u8 *wlanhdr = get_recvframe_data(rframe);
if (phydm->support_ic_type & PHYSTS_2ND_TYPE_IC) {
/*
* 8723D:
* type_0(CCK)
* l_rxsc
* is filled with primary channel SC, not real rxsc.
* 0:LSC, 1:USC
* type_1(OFDM)
* rf_mode
* RF bandwidth when RX
* l_rxsc(legacy), ht_rxsc
* see below RXSC N-series
* type_2(Not used)
*/
/*
* 8821C, 8822B:
* type_0(CCK)
* l_rxsc
* is filled with primary channel SC, not real rxsc.
* 0:LSC, 1:USC
* type_1(OFDM)
* rf_mode
* RF bandwidth when RX
* l_rxsc(legacy), ht_rxsc
* see below RXSC AC-series
* type_2(Not used)
*/
if ((*phys & 0xf) == 0) {
struct phy_sts_rpt_jgr2_type0 *phys_t0 = (struct phy_sts_rpt_jgr2_type0 *)phys;
if (DBG_RX_PHYSTATUS_CHINFO) {
RTW_PRINT("phys_t%u ta="MAC_FMT" %s, %s(band:%u, ch:%u, l_rxsc:%u)\n"
, *phys & 0xf
, MAC_ARG(get_ta(wlanhdr))
, is_broadcast_mac_addr(get_ra(wlanhdr)) ? "BC" : is_multicast_mac_addr(get_ra(wlanhdr)) ? "MC" : "UC"
, HDATA_RATE(attrib->data_rate)
, phys_t0->band, phys_t0->channel, phys_t0->rxsc
);
}
} else if ((*phys & 0xf) == 1) {
struct phy_sts_rpt_jgr2_type1 *phys_t1 = (struct phy_sts_rpt_jgr2_type1 *)phys;
u8 rxsc = (attrib->data_rate > DESC_RATE11M && attrib->data_rate < DESC_RATEMCS0) ? phys_t1->l_rxsc : phys_t1->ht_rxsc;
u8 pkt_cch = 0;
u8 pkt_bw = CHANNEL_WIDTH_20;
#if ODM_IC_11N_SERIES_SUPPORT
if (phydm->support_ic_type & ODM_IC_11N_SERIES) {
/* RXSC N-series */
#define RXSC_DUP 0
#define RXSC_LSC 1
#define RXSC_USC 2
#define RXSC_40M 3
static const s8 cch_offset_by_rxsc[4] = {0, -2, 2, 0};
if (phys_t1->rf_mode == 0) {
pkt_cch = phys_t1->channel;
pkt_bw = CHANNEL_WIDTH_20;
} else if (phys_t1->rf_mode == 1) {
if (rxsc == RXSC_LSC || rxsc == RXSC_USC) {
pkt_cch = phys_t1->channel + cch_offset_by_rxsc[rxsc];
pkt_bw = CHANNEL_WIDTH_20;
} else if (rxsc == RXSC_40M) {
pkt_cch = phys_t1->channel;
pkt_bw = CHANNEL_WIDTH_40;
}
} else
rtw_warn_on(1);
goto type1_end;
}
#endif /* ODM_IC_11N_SERIES_SUPPORT */
#if ODM_IC_11AC_SERIES_SUPPORT
if (phydm->support_ic_type & ODM_IC_11AC_SERIES) {
/* RXSC AC-series */
#define RXSC_DUP 0 /* 0: RX from all SC of current rf_mode */
#define RXSC_LL20M_OF_160M 8 /* 1~8: RX from 20MHz SC */
#define RXSC_L20M_OF_160M 6
#define RXSC_L20M_OF_80M 4
#define RXSC_L20M_OF_40M 2
#define RXSC_U20M_OF_40M 1
#define RXSC_U20M_OF_80M 3
#define RXSC_U20M_OF_160M 5
#define RXSC_UU20M_OF_160M 7
#define RXSC_L40M_OF_160M 12 /* 9~12: RX from 40MHz SC */
#define RXSC_L40M_OF_80M 10
#define RXSC_U40M_OF_80M 9
#define RXSC_U40M_OF_160M 11
#define RXSC_L80M_OF_160M 14 /* 13~14: RX from 80MHz SC */
#define RXSC_U80M_OF_160M 13
static const s8 cch_offset_by_rxsc[15] = {0, 2, -2, 6, -6, 10, -10, 14, -14, 4, -4, 12, -12, 8, -8};
if (phys_t1->rf_mode > 3) {
/* invalid rf_mode */
rtw_warn_on(1);
goto type1_end;
}
if (phys_t1->rf_mode == 0) {
/* RF 20MHz */
pkt_cch = phys_t1->channel;
pkt_bw = CHANNEL_WIDTH_20;
goto type1_end;
}
if (rxsc == 0) {
/* RF and RX with same BW */
if (attrib->data_rate >= DESC_RATEMCS0) {
pkt_cch = phys_t1->channel;
pkt_bw = phys_t1->rf_mode;
}
goto type1_end;
}
if ((phys_t1->rf_mode == 1 && rxsc >= 1 && rxsc <= 2) /* RF 40MHz, RX 20MHz */
|| (phys_t1->rf_mode == 2 && rxsc >= 1 && rxsc <= 4) /* RF 80MHz, RX 20MHz */
|| (phys_t1->rf_mode == 3 && rxsc >= 1 && rxsc <= 8) /* RF 160MHz, RX 20MHz */
) {
pkt_cch = phys_t1->channel + cch_offset_by_rxsc[rxsc];
pkt_bw = CHANNEL_WIDTH_20;
} else if ((phys_t1->rf_mode == 2 && rxsc >= 9 && rxsc <= 10) /* RF 80MHz, RX 40MHz */
|| (phys_t1->rf_mode == 3 && rxsc >= 9 && rxsc <= 12) /* RF 160MHz, RX 40MHz */
) {
if (attrib->data_rate >= DESC_RATEMCS0) {
pkt_cch = phys_t1->channel + cch_offset_by_rxsc[rxsc];
pkt_bw = CHANNEL_WIDTH_40;
}
} else if ((phys_t1->rf_mode == 3 && rxsc >= 13 && rxsc <= 14) /* RF 160MHz, RX 80MHz */
) {
if (attrib->data_rate >= DESC_RATEMCS0) {
pkt_cch = phys_t1->channel + cch_offset_by_rxsc[rxsc];
pkt_bw = CHANNEL_WIDTH_80;
}
} else
rtw_warn_on(1);
}
#endif /* ODM_IC_11AC_SERIES_SUPPORT */
type1_end:
if (DBG_RX_PHYSTATUS_CHINFO) {
RTW_PRINT("phys_t%u ta="MAC_FMT" %s, %s(band:%u, ch:%u, rf_mode:%u, l_rxsc:%u, ht_rxsc:%u) => %u,%u\n"
, *phys & 0xf
, MAC_ARG(get_ta(wlanhdr))
, is_broadcast_mac_addr(get_ra(wlanhdr)) ? "BC" : is_multicast_mac_addr(get_ra(wlanhdr)) ? "MC" : "UC"
, HDATA_RATE(attrib->data_rate)
, phys_t1->band, phys_t1->channel, phys_t1->rf_mode, phys_t1->l_rxsc, phys_t1->ht_rxsc
, pkt_cch, pkt_bw
);
}
/* for now, only return cneter channel of 20MHz packet */
if (pkt_cch && pkt_bw == CHANNEL_WIDTH_20)
attrib->ch = pkt_cch;
} else {
struct phy_sts_rpt_jgr2_type2 *phys_t2 = (struct phy_sts_rpt_jgr2_type2 *)phys;
if (DBG_RX_PHYSTATUS_CHINFO) {
RTW_PRINT("phys_t%u ta="MAC_FMT" %s, %s(band:%u, ch:%u, l_rxsc:%u, ht_rxsc:%u)\n"
, *phys & 0xf
, MAC_ARG(get_ta(wlanhdr))
, is_broadcast_mac_addr(get_ra(wlanhdr)) ? "BC" : is_multicast_mac_addr(get_ra(wlanhdr)) ? "MC" : "UC"
, HDATA_RATE(attrib->data_rate)
, phys_t2->band, phys_t2->channel, phys_t2->l_rxsc, phys_t2->ht_rxsc
);
}
}
}
#endif /* (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1) */
}
#if defined(CONFIG_RTL8822C) && defined(CONFIG_LPS_PG)
void
debug_DACK(
struct dm_struct *dm
)
{
//P_PHYDM_FUNC dm;
//dm = &(SysMib.ODM.Phydm);
//PIQK_OFFLOAD_PARM pIQK_info;
//pIQK_info= &(SysMib.ODM.IQKParm);
u8 i;
u32 temp1, temp2, temp3;
temp1 = odm_get_bb_reg(dm, 0x1860, bMaskDWord);
temp2 = odm_get_bb_reg(dm, 0x4160, bMaskDWord);
temp3 = odm_get_bb_reg(dm, 0x9b4, bMaskDWord);
odm_set_bb_reg(dm, 0x9b4, bMaskDWord, 0xdb66db00);
//pathA
odm_set_bb_reg(dm, 0x1830, BIT(30), 0x0);
odm_set_bb_reg(dm, 0x1860, 0xfc000000, 0x3c);
RTW_INFO("path A i\n");
//i
for (i = 0; i < 0xf; i++) {
odm_set_bb_reg(dm, 0x18b0, 0xf0000000, i);
RTW_INFO("[0][0][%d] = 0x%08x\n", i, (u16)odm_get_bb_reg(dm,0x2810,0x7fc0000));
//pIQK_info->msbk_d[0][0][i] = (u16)odm_get_bb_reg(dm,0x2810,0x7fc0000);
}
RTW_INFO("path A q\n");
//q
for (i = 0; i < 0xf; i++) {
odm_set_bb_reg(dm, 0x18cc, 0xf0000000, i);
RTW_INFO("[0][1][%d] = 0x%08x\n", i, (u16)odm_get_bb_reg(dm,0x283c,0x7fc0000));
//pIQK_info->msbk_d[0][1][i] = (u16)odm_get_bb_reg(dm,0x283c,0x7fc0000);
}
//pathB
odm_set_bb_reg(dm, 0x4130, BIT(30), 0x0);
odm_set_bb_reg(dm, 0x4160, 0xfc000000, 0x3c);
RTW_INFO("\npath B i\n");
//i
for (i = 0; i < 0xf; i++) {
odm_set_bb_reg(dm, 0x41b0, 0xf0000000, i);
RTW_INFO("[1][0][%d] = 0x%08x\n", i, (u16)odm_get_bb_reg(dm,0x4510,0x7fc0000));
//pIQK_info->msbk_d[1][0][i] = (u16)odm_get_bb_reg(dm,0x2810,0x7fc0000);
}
RTW_INFO("path B q\n");
//q
for (i = 0; i < 0xf; i++) {
odm_set_bb_reg(dm, 0x41cc, 0xf0000000, i);
RTW_INFO("[1][1][%d] = 0x%08x\n", i, (u16)odm_get_bb_reg(dm,0x453c,0x7fc0000));
//pIQK_info->msbk_d[1][1][i] = (u16)odm_get_bb_reg(dm,0x283c,0x7fc0000);
}
//restore to normal
odm_set_bb_reg(dm, 0x1830, BIT(30), 0x1);
odm_set_bb_reg(dm, 0x4130, BIT(30), 0x1);
odm_set_bb_reg(dm, 0x1860, bMaskDWord, temp1);
odm_set_bb_reg(dm, 0x4160, bMaskDWord, temp2);
odm_set_bb_reg(dm, 0x9b4, bMaskDWord, temp3);
}
void
debug_IQK(
struct dm_struct *dm,
IN u8 idx,
IN u8 path
)
{
u8 i, ch;
u32 tmp;
u32 bit_mask_20_16 = BIT(20) | BIT(19) | BIT(18) | BIT(17) | BIT(16);
RTW_INFO("idx = %d, path = %d\n", idx, path);
odm_set_bb_reg(dm, 0x1b00, MASKDWORD, 0x8 | path << 1);
if (idx == TX_IQK) {//TXCFIR
odm_set_bb_reg(dm, R_0x1b20, BIT(31) | BIT(30), 0x3);
} else {//RXCFIR
odm_set_bb_reg(dm, R_0x1b20, BIT(31) | BIT(30), 0x1);
}
odm_set_bb_reg(dm, R_0x1bd4, BIT(21), 0x1);
odm_set_bb_reg(dm, R_0x1bd4, bit_mask_20_16, 0x10);
for (i = 0; i <= 16; i++) {
odm_set_bb_reg(dm, R_0x1bd8, MASKDWORD, 0xe0000001 | i << 2);
tmp = odm_get_bb_reg(dm, R_0x1bfc, MASKDWORD);
RTW_INFO("iqk_cfir_real[%d][%d][%d] = 0x%x\n", path, idx, i, ((tmp & 0x0fff0000) >> 16));
//iqk_info->iqk_cfir_real[ch][path][idx][i] =
// (tmp & 0x0fff0000) >> 16;
RTW_INFO("iqk_cfir_imag[%d][%d][%d] = 0x%x\n", path, idx, i, (tmp & 0x0fff));
//iqk_info->iqk_cfir_imag[ch][path][idx][i] = tmp & 0x0fff;
}
odm_set_bb_reg(dm, R_0x1b20, BIT(31) | BIT(30), 0x0);
//odm_set_bb_reg(dm, R_0x1bd8, MASKDWORD, 0x0);
}
__odm_func__ void
debug_information_8822c(
struct dm_struct *dm)
{
struct dm_dpk_info *dpk_info = &dm->dpk_info;
u32 reg_rf18;
if (odm_get_bb_reg(dm, R_0x1e7c, BIT(30)))
dpk_info->is_tssi_mode = true;
else
dpk_info->is_tssi_mode = false;
reg_rf18 = odm_get_rf_reg(dm, RF_PATH_A, RF_0x18, RFREG_MASK);
dpk_info->dpk_band = (u8)((reg_rf18 & BIT(16)) >> 16); /*0/1:G/A*/
dpk_info->dpk_ch = (u8)reg_rf18 & 0xff;
dpk_info->dpk_bw = (u8)((reg_rf18 & 0x3000) >> 12); /*3/2/1:20/40/80*/
RTW_INFO("[DPK] TSSI/ Band/ CH/ BW = %d / %s / %d / %s\n",
dpk_info->is_tssi_mode, dpk_info->dpk_band == 0 ? "2G" : "5G",
dpk_info->dpk_ch,
dpk_info->dpk_bw == 3 ? "20M" : (dpk_info->dpk_bw == 2 ? "40M" : "80M"));
}
extern void _dpk_get_coef_8822c(void *dm_void, u8 path);
__odm_func__ void
debug_reload_data_8822c(
void *dm_void)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct dm_dpk_info *dpk_info = &dm->dpk_info;
u8 path;
u32 u32tmp;
debug_information_8822c(dm);
for (path = 0; path < DPK_RF_PATH_NUM_8822C; path++) {
RTW_INFO("[DPK] Reload path: 0x%x\n", path);
odm_set_bb_reg(dm, R_0x1b00, MASKDWORD, 0x8 | (path << 1));
/*txagc bnd*/
if (dpk_info->dpk_band == 0x0)
u32tmp = odm_get_bb_reg(dm, R_0x1b60, MASKDWORD);
else
u32tmp = odm_get_bb_reg(dm, R_0x1b60, MASKDWORD);
RTW_INFO("[DPK] txagc bnd = 0x%08x\n", u32tmp);
u32tmp = odm_get_bb_reg(dm, R_0x1b64, MASKBYTE3);
RTW_INFO("[DPK] dpk_txagc = 0x%08x\n", u32tmp);
//debug_coef_write_8822c(dm, path, dpk_info->dpk_path_ok & BIT(path) >> path);
_dpk_get_coef_8822c(dm, path);
//debug_one_shot_8822c(dm, path, DPK_ON);
odm_set_bb_reg(dm, R_0x1b00, 0x0000000f, 0xc);
if (path == RF_PATH_A)
u32tmp = odm_get_bb_reg(dm, R_0x1b04, 0x0fffffff);
else
u32tmp = odm_get_bb_reg(dm, R_0x1b5c, 0x0fffffff);
RTW_INFO("[DPK] dpk_gs = 0x%08x\n", u32tmp);
}
}
void odm_lps_pg_debug_8822c(void *dm_void)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
debug_DACK(dm);
debug_IQK(dm, TX_IQK, RF_PATH_A);
debug_IQK(dm, RX_IQK, RF_PATH_A);
debug_IQK(dm, TX_IQK, RF_PATH_B);
debug_IQK(dm, RX_IQK, RF_PATH_B);
debug_reload_data_8822c(dm);
}
#endif /* defined(CONFIG_RTL8822C) && defined(CONFIG_LPS_PG) */

5386
core/rtw_p2p.c Normal file
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2905
core/rtw_pwrctrl.c Normal file
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4954
core/rtw_recv.c Executable file
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1387
core/rtw_rf.c Normal file
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2470
core/rtw_rm.c Normal file
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998
core/rtw_rm_fsm.c Normal file
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@ -0,0 +1,998 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#include <drv_types.h>
#include <hal_data.h>
#include "rtw_rm_fsm.h"
#ifdef CONFIG_RTW_80211K
struct fsm_state {
u8 *name;
int(*fsm_func)(struct rm_obj *prm, enum RM_EV_ID evid);
};
static void rm_state_initial(struct rm_obj *prm);
static void rm_state_goto(struct rm_obj *prm, enum RM_STATE rm_state);
static void rm_state_run(struct rm_obj *prm, enum RM_EV_ID evid);
static struct rm_event *rm_dequeue_ev(_queue *queue);
static struct rm_obj *rm_dequeue_rm(_queue *queue);
void rm_timer_callback(void *data)
{
int i;
_adapter *padapter = (_adapter *)data;
struct rm_priv *prmpriv = &padapter->rmpriv;
struct rm_clock *pclock;
/* deal with clock */
for (i=0;i<RM_TIMER_NUM;i++) {
pclock = &prmpriv->clock[i];
if (pclock->prm == NULL
||(ATOMIC_READ(&(pclock->counter)) == 0))
continue;
ATOMIC_DEC(&(pclock->counter));
if (ATOMIC_READ(&(pclock->counter)) == 0)
rm_post_event(pclock->prm->psta->padapter,
pclock->prm->rmid, prmpriv->clock[i].evid);
}
_set_timer(&prmpriv->rm_timer, CLOCK_UNIT);
}
int rtw_init_rm(_adapter *padapter)
{
struct rm_priv *prmpriv = &padapter->rmpriv;
RTW_INFO("RM: %s\n",__func__);
_rtw_init_queue(&(prmpriv->rm_queue));
_rtw_init_queue(&(prmpriv->ev_queue));
/* bit 0-7 */
prmpriv->rm_en_cap_def[0] = 0
/*| BIT(RM_LINK_MEAS_CAP_EN)*/
| BIT(RM_NB_REP_CAP_EN)
/*| BIT(RM_PARAL_MEAS_CAP_EN)*/
| BIT(RM_REPEAT_MEAS_CAP_EN)
| BIT(RM_BCN_PASSIVE_MEAS_CAP_EN)
| BIT(RM_BCN_ACTIVE_MEAS_CAP_EN)
| BIT(RM_BCN_TABLE_MEAS_CAP_EN)
/*| BIT(RM_BCN_MEAS_REP_COND_CAP_EN)*/;
/* bit 8-15 */
prmpriv->rm_en_cap_def[1] = 0
/*| BIT(RM_FRAME_MEAS_CAP_EN - 8)*/
#ifdef CONFIG_RTW_ACS
| BIT(RM_CH_LOAD_CAP_EN - 8)
| BIT(RM_NOISE_HISTO_CAP_EN - 8)
#endif
/*| BIT(RM_STATIS_MEAS_CAP_EN - 8)*/
/*| BIT(RM_LCI_MEAS_CAP_EN - 8)*/
/*| BIT(RM_LCI_AMIMUTH_CAP_EN - 8)*/
/*| BIT(RM_TRANS_STREAM_CAT_MEAS_CAP_EN - 8)*/
/*| BIT(RM_TRIG_TRANS_STREAM_CAT_MEAS_CAP_EN - 8)*/;
/* bit 16-23 */
prmpriv->rm_en_cap_def[2] = 0
/*| BIT(RM_AP_CH_REP_CAP_EN - 16)*/
/*| BIT(RM_RM_MIB_CAP_EN - 16)*/
/*| BIT(RM_OP_CH_MAX_MEAS_DUR0 - 16)*/
/*| BIT(RM_OP_CH_MAX_MEAS_DUR1 - 16)*/
/*| BIT(RM_OP_CH_MAX_MEAS_DUR2 - 16)*/
/*| BIT(RM_NONOP_CH_MAX_MEAS_DUR0 - 16)*/
/*| BIT(RM_NONOP_CH_MAX_MEAS_DUR1 - 16)*/
/*| BIT(RM_NONOP_CH_MAX_MEAS_DUR2 - 16)*/;
/* bit 24-31 */
prmpriv->rm_en_cap_def[3] = 0
/*| BIT(RM_MEAS_PILOT_CAP0 - 24)*/
/*| BIT(RM_MEAS_PILOT_CAP1 - 24)*/
/*| BIT(RM_MEAS_PILOT_CAP2 - 24)*/
/*| BIT(RM_MEAS_PILOT_TRANS_INFO_CAP_EN - 24)*/
/*| BIT(RM_NB_REP_TSF_OFFSET_CAP_EN - 24)*/
| BIT(RM_RCPI_MEAS_CAP_EN - 24)
| BIT(RM_RSNI_MEAS_CAP_EN - 24)
/*| BIT(RM_BSS_AVG_ACCESS_DELAY_CAP_EN - 24)*/;
/* bit 32-39 */
prmpriv->rm_en_cap_def[4] = 0
/*| BIT(RM_BSS_AVG_ACCESS_DELAY_CAP_EN - 32)*/
/*| BIT(RM_AVALB_ADMIS_CAPACITY_CAP_EN - 32)*/
/*| BIT(RM_ANT_CAP_EN - 32)*/;
prmpriv->enable = _TRUE;
/* clock timer */
rtw_init_timer(&prmpriv->rm_timer,
padapter, rm_timer_callback, padapter);
_set_timer(&prmpriv->rm_timer, CLOCK_UNIT);
return _SUCCESS;
}
int rtw_deinit_rm(_adapter *padapter)
{
struct rm_priv *prmpriv = &padapter->rmpriv;
struct rm_obj *prm;
struct rm_event *pev;
RTW_INFO("RM: %s\n",__func__);
prmpriv->enable = _FALSE;
_cancel_timer_ex(&prmpriv->rm_timer);
/* free all events and measurements */
while((pev = rm_dequeue_ev(&prmpriv->ev_queue)) != NULL)
rtw_mfree((void *)pev, sizeof(struct rm_event));
while((prm = rm_dequeue_rm(&prmpriv->rm_queue)) != NULL)
rm_state_run(prm, RM_EV_cancel);
_rtw_deinit_queue(&(prmpriv->rm_queue));
_rtw_deinit_queue(&(prmpriv->ev_queue));
return _SUCCESS;
}
int rtw_free_rm_priv(_adapter *padapter)
{
return rtw_deinit_rm(padapter);
}
static int rm_enqueue_ev(_queue *queue, struct rm_event *obj, bool to_head)
{
_irqL irqL;
if (obj == NULL)
return _FAIL;
_enter_critical(&queue->lock, &irqL);
if (to_head)
rtw_list_insert_head(&obj->list, &queue->queue);
else
rtw_list_insert_tail(&obj->list, &queue->queue);
_exit_critical(&queue->lock, &irqL);
return _SUCCESS;
}
static void rm_set_clock(struct rm_obj *prm, u32 ms, enum RM_EV_ID evid)
{
ATOMIC_SET(&(prm->pclock->counter), (ms/CLOCK_UNIT));
prm->pclock->evid = evid;
}
static struct rm_clock *rm_alloc_clock(_adapter *padapter, struct rm_obj *prm)
{
int i;
struct rm_priv *prmpriv = &padapter->rmpriv;
struct rm_clock *pclock = NULL;
for (i=0;i<RM_TIMER_NUM;i++) {
pclock = &prmpriv->clock[i];
if (pclock->prm == NULL) {
pclock->prm = prm;
ATOMIC_SET(&(pclock->counter), 0);
pclock->evid = RM_EV_max;
break;
}
}
return pclock;
}
static void rm_cancel_clock(struct rm_obj *prm)
{
ATOMIC_SET(&(prm->pclock->counter), 0);
prm->pclock->evid = RM_EV_max;
}
static void rm_free_clock(struct rm_clock *pclock)
{
pclock->prm = NULL;
ATOMIC_SET(&(pclock->counter), 0);
pclock->evid = RM_EV_max;
}
static int is_list_linked(const struct list_head *head)
{
return head->prev != NULL;
}
void rm_free_rmobj(struct rm_obj *prm)
{
if (is_list_linked(&prm->list))
rtw_list_delete(&prm->list);
if (prm->q.pssid)
rtw_mfree(prm->q.pssid, strlen(prm->q.pssid)+1);
if (prm->q.opt.bcn.req_start)
rtw_mfree(prm->q.opt.bcn.req_start,
prm->q.opt.bcn.req_len);
if (prm->pclock)
rm_free_clock(prm->pclock);
rtw_mfree((void *)prm, sizeof(struct rm_obj));
}
struct rm_obj *rm_alloc_rmobj(_adapter *padapter)
{
struct rm_obj *prm;
prm = (struct rm_obj *)rtw_malloc(sizeof(struct rm_obj));
if (prm == NULL)
return NULL;
_rtw_memset(prm, 0, sizeof(struct rm_obj));
/* alloc timer */
if ((prm->pclock = rm_alloc_clock(padapter, prm)) == NULL) {
rm_free_rmobj(prm);
return NULL;
}
return prm;
}
int rm_enqueue_rmobj(_adapter *padapter, struct rm_obj *prm, bool to_head)
{
_irqL irqL;
struct rm_priv *prmpriv = &padapter->rmpriv;
_queue *queue = &prmpriv->rm_queue;
if (prm == NULL)
return _FAIL;
_enter_critical(&queue->lock, &irqL);
if (to_head)
rtw_list_insert_head(&prm->list, &queue->queue);
else
rtw_list_insert_tail(&prm->list, &queue->queue);
_exit_critical(&queue->lock, &irqL);
rm_state_initial(prm);
return _SUCCESS;
}
static struct rm_obj *rm_dequeue_rm(_queue *queue)
{
_irqL irqL;
struct rm_obj *prm;
_enter_critical(&queue->lock, &irqL);
if (rtw_is_list_empty(&(queue->queue)))
prm = NULL;
else {
prm = LIST_CONTAINOR(get_next(&(queue->queue)),
struct rm_obj, list);
/* rtw_list_delete(&prm->list); */
}
_exit_critical(&queue->lock, &irqL);
return prm;
}
static struct rm_event *rm_dequeue_ev(_queue *queue)
{
_irqL irqL;
struct rm_event *ev;
_enter_critical(&queue->lock, &irqL);
if (rtw_is_list_empty(&(queue->queue)))
ev = NULL;
else {
ev = LIST_CONTAINOR(get_next(&(queue->queue)),
struct rm_event, list);
rtw_list_delete(&ev->list);
}
_exit_critical(&queue->lock, &irqL);
return ev;
}
static struct rm_obj *_rm_get_rmobj(_queue *queue, u32 rmid)
{
_irqL irqL;
_list *phead, *plist;
struct rm_obj *prm = NULL;
if (rmid == 0)
return NULL;
_enter_critical(&queue->lock, &irqL);
phead = get_list_head(queue);
plist = get_next(phead);
while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) {
prm = LIST_CONTAINOR(plist, struct rm_obj, list);
if (rmid == (prm->rmid)) {
_exit_critical(&queue->lock, &irqL);
return prm;
}
plist = get_next(plist);
}
_exit_critical(&queue->lock, &irqL);
return NULL;
}
struct sta_info *rm_get_psta(_adapter *padapter, u32 rmid)
{
struct rm_priv *prmpriv = &padapter->rmpriv;
struct rm_obj *prm;
prm = _rm_get_rmobj(&prmpriv->rm_queue, rmid);
if (prm)
return prm->psta;
return NULL;
}
struct rm_obj *rm_get_rmobj(_adapter *padapter, u32 rmid)
{
struct rm_priv *prmpriv = &padapter->rmpriv;
return _rm_get_rmobj(&prmpriv->rm_queue, rmid);
}
u8 rtw_rm_post_envent_cmd(_adapter *padapter, u32 rmid, u8 evid)
{
struct cmd_obj *pcmd;
struct rm_event *pev;
struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
u8 res = _SUCCESS;
pcmd = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj));
if (pcmd == NULL) {
res = _FAIL;
goto exit;
}
pev = (struct rm_event*)rtw_zmalloc(sizeof(struct rm_event));
if (pev == NULL) {
rtw_mfree((u8 *) pcmd, sizeof(struct cmd_obj));
res = _FAIL;
goto exit;
}
pev->rmid = rmid;
pev->evid = evid;
init_h2fwcmd_w_parm_no_rsp(pcmd, pev, GEN_CMD_CODE(_RM_POST_EVENT));
res = rtw_enqueue_cmd(pcmdpriv, pcmd);
exit:
return res;
}
int rm_post_event(_adapter *padapter, u32 rmid, enum RM_EV_ID evid)
{
if (padapter->rmpriv.enable == _FALSE)
return _FALSE;
RTW_INFO("RM: post asyn %s to rmid=%x\n", rm_event_name(evid), rmid);
rtw_rm_post_envent_cmd(padapter, rmid, evid);
return _SUCCESS;
}
int _rm_post_event(_adapter *padapter, u32 rmid, enum RM_EV_ID evid)
{
struct rm_priv *prmpriv = &padapter->rmpriv;
struct rm_event *pev;
if (evid >= RM_EV_max || rmid == 0)
return _FALSE;
pev = (struct rm_event *)rtw_malloc(sizeof(struct rm_event));
if (pev == NULL)
return _FALSE;
pev->rmid = rmid;
pev->evid = evid;
RTW_INFO("RM: post sync %s to rmid=%x\n", rm_event_name(evid), rmid);
rm_enqueue_ev(&prmpriv->ev_queue, pev, FALSE);
return _SUCCESS;
}
static void rm_bcast_aid_handler(_adapter *padapter, struct rm_event *pev)
{
_irqL irqL;
_list *phead, *plist;
_queue *queue = &padapter->rmpriv.rm_queue;
struct rm_obj *prm;
_enter_critical(&queue->lock, &irqL);
phead = get_list_head(queue);
plist = get_next(phead);
while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) {
prm = LIST_CONTAINOR(plist, struct rm_obj, list);
plist = get_next(plist);
if (RM_GET_AID(pev->rmid) == RM_GET_AID(prm->rmid)) {
_exit_critical(&queue->lock, &irqL);
rm_state_run(prm, pev->evid);
_enter_critical(&queue->lock, &irqL);
}
}
_exit_critical(&queue->lock, &irqL);
return;
}
/* main handler of RM (Resource Management) */
void rm_handler(_adapter *padapter, struct rm_event *pe)
{
int i;
struct rm_priv *prmpriv = &padapter->rmpriv;
struct rm_obj *prm;
struct rm_event *pev;
/* dequeue event */
while((pev = rm_dequeue_ev(&prmpriv->ev_queue)) != NULL)
{
if (RM_IS_ID_FOR_ALL(pev->rmid)) {
/* apply to all aid mateched measurement */
rm_bcast_aid_handler(padapter, pev);
rtw_mfree((void *)pev, sizeof(struct rm_event));
continue;
}
/* retrieve rmobj */
prm = _rm_get_rmobj(&prmpriv->rm_queue, pev->rmid);
if (prm == NULL) {
RTW_ERR("RM: rmid=%x event=%s doesn't find rm obj\n",
pev->rmid, rm_event_name(pev->evid));
rtw_mfree((void *)pev, sizeof(struct rm_event));
return;
}
/* run state machine */
rm_state_run(prm, pev->evid);
rtw_mfree((void *)pev, sizeof(struct rm_event));
}
}
static int rm_issue_meas_req(struct rm_obj *prm)
{
switch (prm->q.action_code) {
case RM_ACT_RADIO_MEAS_REQ:
switch (prm->q.m_type) {
case bcn_req:
case ch_load_req:
case noise_histo_req:
issue_radio_meas_req(prm);
break;
default:
break;
} /* meas_type */
break;
case RM_ACT_NB_REP_REQ:
/* issue neighbor request */
issue_nb_req(prm);
break;
case RM_ACT_LINK_MEAS_REQ:
default:
return _FALSE;
} /* action_code */
return _SUCCESS;
}
/*
* RM state machine
*/
static int rm_state_idle(struct rm_obj *prm, enum RM_EV_ID evid)
{
_adapter *padapter = prm->psta->padapter;
u8 val8;
u32 val32;
prm->p.category = RTW_WLAN_CATEGORY_RADIO_MEAS;
switch (evid) {
case RM_EV_state_in:
switch (prm->q.action_code) {
case RM_ACT_RADIO_MEAS_REQ:
/* copy attrib from meas_req to meas_rep */
prm->p.action_code = RM_ACT_RADIO_MEAS_REP;
prm->p.diag_token = prm->q.diag_token;
prm->p.e_id = _MEAS_RSP_IE_;
prm->p.m_token = prm->q.m_token;
prm->p.m_type = prm->q.m_type;
prm->p.rpt = prm->q.rpt;
prm->p.ch_num = prm->q.ch_num;
prm->p.op_class = prm->q.op_class;
if (prm->q.m_type == ch_load_req
|| prm->q.m_type == noise_histo_req) {
/*
* phydm measure current ch periodically
* scan current ch is not necessary
*/
val8 = padapter->mlmeextpriv.cur_channel;
if (prm->q.ch_num == val8)
prm->poll_mode = 1;
}
RTW_INFO("RM: rmid=%x %s switch in repeat=%u\n",
prm->rmid, rm_type_req_name(prm->q.m_type),
prm->q.rpt);
break;
case RM_ACT_NB_REP_REQ:
prm->p.action_code = RM_ACT_NB_REP_RESP;
RTW_INFO("RM: rmid=%x Neighbor request switch in\n",
prm->rmid);
break;
case RM_ACT_LINK_MEAS_REQ:
prm->p.action_code = RM_ACT_LINK_MEAS_REP;
rm_set_rep_mode(prm, MEAS_REP_MOD_INCAP);
RTW_INFO("RM: rmid=%x Link meas switch in\n",
prm->rmid);
break;
default:
prm->p.action_code = prm->q.action_code;
rm_set_rep_mode(prm, MEAS_REP_MOD_INCAP);
RTW_INFO("RM: rmid=%x recv unknown action %d\n",
prm->rmid,prm->p.action_code);
break;
} /* switch() */
if (prm->rmid & RM_MASTER) {
if (rm_issue_meas_req(prm) == _SUCCESS)
rm_state_goto(prm, RM_ST_WAIT_MEAS);
else
rm_state_goto(prm, RM_ST_END);
return _SUCCESS;
} else {
rm_state_goto(prm, RM_ST_DO_MEAS);
return _SUCCESS;
}
if (prm->p.m_mode) {
issue_null_reply(prm);
rm_state_goto(prm, RM_ST_END);
return _SUCCESS;
}
if (prm->q.rand_intvl) {
/* get low tsf to generate random interval */
val32 = rtw_read32(padapter, REG_TSFTR);
val32 = val32 % prm->q.rand_intvl;
RTW_INFO("RM: rmid=%x rand_intval=%d, rand=%d\n",
prm->rmid, (int)prm->q.rand_intvl,val32);
rm_set_clock(prm, prm->q.rand_intvl,
RM_EV_delay_timer_expire);
return _SUCCESS;
}
break;
case RM_EV_delay_timer_expire:
rm_state_goto(prm, RM_ST_DO_MEAS);
break;
case RM_EV_cancel:
rm_state_goto(prm, RM_ST_END);
break;
case RM_EV_state_out:
rm_cancel_clock(prm);
break;
default:
break;
}
return _SUCCESS;
}
/* we do the measuring */
static int rm_state_do_meas(struct rm_obj *prm, enum RM_EV_ID evid)
{
_adapter *padapter = prm->psta->padapter;
u8 val8;
u64 val64;
switch (evid) {
case RM_EV_state_in:
if (prm->q.action_code == RM_ACT_RADIO_MEAS_REQ) {
switch (prm->q.m_type) {
case bcn_req:
if (prm->q.m_mode == bcn_req_bcn_table) {
RTW_INFO("RM: rmid=%x Beacon table\n",
prm->rmid);
_rm_post_event(padapter, prm->rmid,
RM_EV_survey_done);
return _SUCCESS;
}
break;
case ch_load_req:
case noise_histo_req:
if (prm->poll_mode)
_rm_post_event(padapter, prm->rmid,
RM_EV_survey_done);
return _SUCCESS;
default:
rm_state_goto(prm, RM_ST_END);
return _SUCCESS;
}
if (!ready_for_scan(prm)) {
prm->wait_busy = RM_BUSY_TRAFFIC_TIMES;
RTW_INFO("RM: wait busy traffic - %d\n",
prm->wait_busy);
rm_set_clock(prm, RM_WAIT_BUSY_TIMEOUT,
RM_EV_busy_timer_expire);
return _SUCCESS;
}
}
_rm_post_event(padapter, prm->rmid, RM_EV_start_meas);
break;
case RM_EV_start_meas:
if (prm->q.action_code == RM_ACT_RADIO_MEAS_REQ) {
/* resotre measurement start time */
prm->meas_start_time = rtw_hal_get_tsftr_by_port(padapter
, rtw_hal_get_port(padapter));
switch (prm->q.m_type) {
case bcn_req:
val8 = 1; /* Enable free run counter */
rtw_hal_set_hwreg(padapter,
HW_VAR_FREECNT, &val8);
rm_sitesurvey(prm);
break;
case ch_load_req:
case noise_histo_req:
rm_sitesurvey(prm);
break;
default:
rm_state_goto(prm, RM_ST_END);
return _SUCCESS;
break;
}
}
/* handle measurement timeout */
rm_set_clock(prm, RM_MEAS_TIMEOUT, RM_EV_meas_timer_expire);
break;
case RM_EV_survey_done:
if (prm->q.action_code == RM_ACT_RADIO_MEAS_REQ) {
switch (prm->q.m_type) {
case bcn_req:
rm_cancel_clock(prm);
rm_state_goto(prm, RM_ST_SEND_REPORT);
return _SUCCESS;
case ch_load_req:
case noise_histo_req:
retrieve_radio_meas_result(prm);
if (rm_radio_meas_report_cond(prm) == _SUCCESS)
rm_state_goto(prm, RM_ST_SEND_REPORT);
else
rm_set_clock(prm, RM_COND_INTVL,
RM_EV_retry_timer_expire);
break;
default:
rm_state_goto(prm, RM_ST_END);
return _SUCCESS;
}
}
break;
case RM_EV_meas_timer_expire:
RTW_INFO("RM: rmid=%x measurement timeount\n",prm->rmid);
rm_set_rep_mode(prm, MEAS_REP_MOD_REFUSE);
issue_null_reply(prm);
rm_state_goto(prm, RM_ST_END);
break;
case RM_EV_busy_timer_expire:
if (!ready_for_scan(prm) && prm->wait_busy--) {
RTW_INFO("RM: wait busy - %d\n",prm->wait_busy);
rm_set_clock(prm, RM_WAIT_BUSY_TIMEOUT,
RM_EV_busy_timer_expire);
break;
}
else if (prm->wait_busy <= 0) {
RTW_INFO("RM: wait busy timeout\n");
rm_set_rep_mode(prm, MEAS_REP_MOD_REFUSE);
issue_null_reply(prm);
rm_state_goto(prm, RM_ST_END);
return _SUCCESS;
}
_rm_post_event(padapter, prm->rmid, RM_EV_start_meas);
break;
case RM_EV_request_timer_expire:
rm_set_rep_mode(prm, MEAS_REP_MOD_REFUSE);
issue_null_reply(prm);
rm_state_goto(prm, RM_ST_END);
break;
case RM_EV_retry_timer_expire:
/* expired due to meas condition mismatch, meas again */
_rm_post_event(padapter, prm->rmid, RM_EV_start_meas);
break;
case RM_EV_cancel:
rm_set_rep_mode(prm, MEAS_REP_MOD_REFUSE);
issue_null_reply(prm);
rm_state_goto(prm, RM_ST_END);
break;
case RM_EV_state_out:
rm_cancel_clock(prm);
/* resotre measurement end time */
prm->meas_end_time = rtw_hal_get_tsftr_by_port(padapter
, rtw_hal_get_port(padapter));
val8 = 0; /* Disable free run counter */
rtw_hal_set_hwreg(padapter, HW_VAR_FREECNT, &val8);
break;
default:
break;
}
return _SUCCESS;
}
static int rm_state_wait_meas(struct rm_obj *prm, enum RM_EV_ID evid)
{
u8 val8;
u64 val64;
switch (evid) {
case RM_EV_state_in:
/* we create meas_req, waiting for peer report */
rm_set_clock(prm, RM_REQ_TIMEOUT,
RM_EV_request_timer_expire);
break;
case RM_EV_recv_rep:
rm_state_goto(prm, RM_ST_RECV_REPORT);
break;
case RM_EV_request_timer_expire:
case RM_EV_cancel:
rm_state_goto(prm, RM_ST_END);
break;
case RM_EV_state_out:
rm_cancel_clock(prm);
break;
default:
break;
}
return _SUCCESS;
}
static int rm_state_send_report(struct rm_obj *prm, enum RM_EV_ID evid)
{
u8 val8;
switch (evid) {
case RM_EV_state_in:
/* we have to issue report */
switch (prm->q.m_type) {
case bcn_req:
issue_beacon_rep(prm);
break;
case ch_load_req:
case noise_histo_req:
issue_radio_meas_rep(prm);
break;
default:
rm_state_goto(prm, RM_ST_END);
return _SUCCESS;
}
/* check repeat */
if (prm->p.rpt) {
RTW_INFO("RM: rmid=%x repeat=%u/%u\n",
prm->rmid, prm->p.rpt,
prm->q.rpt);
prm->p.rpt--;
/*
* we recv meas_req,
* delay for a wihile and than meas again
*/
if (prm->poll_mode)
rm_set_clock(prm, RM_REPT_POLL_INTVL,
RM_EV_repeat_delay_expire);
else
rm_set_clock(prm, RM_REPT_SCAN_INTVL,
RM_EV_repeat_delay_expire);
return _SUCCESS;
}
/* we are done */
rm_state_goto(prm, RM_ST_END);
break;
case RM_EV_repeat_delay_expire:
rm_state_goto(prm, RM_ST_DO_MEAS);
break;
case RM_EV_cancel:
rm_state_goto(prm, RM_ST_END);
break;
case RM_EV_state_out:
rm_cancel_clock(prm);
break;
default:
break;
}
return _SUCCESS;
}
static int rm_state_recv_report(struct rm_obj *prm, enum RM_EV_ID evid)
{
u8 val8;
switch (evid) {
case RM_EV_state_in:
/* we issue meas_req, got peer's meas report */
switch (prm->p.action_code) {
case RM_ACT_RADIO_MEAS_REP:
/* check refuse, incapable and repeat */
val8 = prm->p.m_mode;
if (val8) {
RTW_INFO("RM: rmid=%x peer reject (%s repeat=%d)\n",
prm->rmid,
val8|MEAS_REP_MOD_INCAP?"INCAP":
val8|MEAS_REP_MOD_REFUSE?"REFUSE":
val8|MEAS_REP_MOD_LATE?"LATE":"",
prm->p.rpt);
rm_state_goto(prm, RM_ST_END);
return _SUCCESS;
}
break;
case RM_ACT_NB_REP_RESP:
/* report to upper layer if needing */
rm_state_goto(prm, RM_ST_END);
return _SUCCESS;
default:
rm_state_goto(prm, RM_ST_END);
return _SUCCESS;
}
/* check repeat */
if (prm->p.rpt) {
RTW_INFO("RM: rmid=%x repeat=%u/%u\n",
prm->rmid, prm->p.rpt,
prm->q.rpt);
prm->p.rpt--;
/* waitting more report */
rm_state_goto(prm, RM_ST_WAIT_MEAS);
break;
}
/* we are done */
rm_state_goto(prm, RM_ST_END);
break;
case RM_EV_cancel:
rm_state_goto(prm, RM_ST_END);
break;
case RM_EV_state_out:
rm_cancel_clock(prm);
break;
default:
break;
}
return _SUCCESS;
}
static int rm_state_end(struct rm_obj *prm, enum RM_EV_ID evid)
{
switch (evid) {
case RM_EV_state_in:
_rm_post_event(prm->psta->padapter, prm->rmid, RM_EV_state_out);
break;
case RM_EV_cancel:
case RM_EV_state_out:
default:
rm_free_rmobj(prm);
break;
}
return _SUCCESS;
}
struct fsm_state rm_fsm[] = {
{"RM_ST_IDLE", rm_state_idle},
{"RM_ST_DO_MEAS", rm_state_do_meas},
{"RM_ST_WAIT_MEAS", rm_state_wait_meas},
{"RM_ST_SEND_REPORT", rm_state_send_report},
{"RM_ST_RECV_REPORT", rm_state_recv_report},
{"RM_ST_END", rm_state_end}
};
char *rm_state_name(enum RM_STATE state)
{
return rm_fsm[state].name;
}
char *rm_event_name(enum RM_EV_ID evid)
{
switch(evid) {
case RM_EV_state_in:
return "RM_EV_state_in";
case RM_EV_busy_timer_expire:
return "RM_EV_busy_timer_expire";
case RM_EV_delay_timer_expire:
return "RM_EV_delay_timer_expire";
case RM_EV_meas_timer_expire:
return "RM_EV_meas_timer_expire";
case RM_EV_repeat_delay_expire:
return "RM_EV_repeat_delay_expire";
case RM_EV_retry_timer_expire:
return "RM_EV_retry_timer_expire";
case RM_EV_request_timer_expire:
return "RM_EV_request_timer_expire";
case RM_EV_wait_report:
return "RM_EV_wait_report";
case RM_EV_start_meas:
return "RM_EV_start_meas";
case RM_EV_survey_done:
return "RM_EV_survey_done";
case RM_EV_recv_rep:
return "RM_EV_recv_report";
case RM_EV_cancel:
return "RM_EV_cancel";
case RM_EV_state_out:
return "RM_EV_state_out";
case RM_EV_max:
return "RM_EV_max";
default:
return "RM_EV_unknown";
}
return "UNKNOWN";
}
static void rm_state_initial(struct rm_obj *prm)
{
prm->state = RM_ST_IDLE;
RTW_INFO("\n");
RTW_INFO("RM: rmid=%x %-18s -> %s\n",prm->rmid,
"new measurement", rm_fsm[prm->state].name);
rm_post_event(prm->psta->padapter, prm->rmid, RM_EV_state_in);
}
static void rm_state_run(struct rm_obj *prm, enum RM_EV_ID evid)
{
RTW_INFO("RM: rmid=%x %-18s %s\n",prm->rmid,
rm_fsm[prm->state].name,rm_event_name(evid));
rm_fsm[prm->state].fsm_func(prm, evid);
}
static void rm_state_goto(struct rm_obj *prm, enum RM_STATE rm_state)
{
if (prm->state == rm_state)
return;
rm_state_run(prm, RM_EV_state_out);
RTW_INFO("\n");
RTW_INFO("RM: rmid=%x %-18s -> %s\n",prm->rmid,
rm_fsm[prm->state].name, rm_fsm[rm_state].name);
prm->state = rm_state;
rm_state_run(prm, RM_EV_state_in);
}
#endif /* CONFIG_RTW_80211K */

588
core/rtw_rson.c Normal file
View File

@ -0,0 +1,588 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _RTW_RSON_C_
#include <drv_types.h>
#ifdef CONFIG_RTW_REPEATER_SON
/******** Custommize Part ***********************/
unsigned char RTW_RSON_OUI[] = {0xFA, 0xFA, 0xFA};
#define RSON_SCORE_DIFF_TH 8
/*
Calculate the corresponding score.
*/
inline u8 rtw_cal_rson_score(struct rtw_rson_struct *cand_rson_data, NDIS_802_11_RSSI Rssi)
{
if ((cand_rson_data->hopcnt == RTW_RSON_HC_NOTREADY)
|| (cand_rson_data->connectible == RTW_RSON_DENYCONNECT))
return RTW_RSON_SCORE_NOTCNNT;
return RTW_RSON_SCORE_MAX - (cand_rson_data->hopcnt * 10) + (Rssi/10);
}
/*************************************************/
static u8 rtw_rson_block_bssid_idx = 0;
u8 rtw_rson_block_bssid[10][6] = {
/*{0x02, 0xE0, 0x4C, 0x07, 0xC3, 0xF6}*/
};
/* fake root, regard a real AP as a SO root */
static u8 rtw_rson_root_bssid_idx = 0;
u8 rtw_rson_root_bssid[10][6] = {
/*{0x1c, 0x5f, 0x2b, 0x5a, 0x60, 0x24}*/
};
int is_match_bssid(u8 *mac, u8 bssid_array[][6], int num)
{
int i;
for (i = 0; i < num; i++)
if (_rtw_memcmp(mac, bssid_array[i], 6) == _TRUE)
return _TRUE;
return _FALSE;
}
void init_rtw_rson_data(struct dvobj_priv *dvobj)
{
/*Aries todo. if pdvobj->rson_data.ver == 1 */
dvobj->rson_data.ver = RTW_RSON_VER;
dvobj->rson_data.id = CONFIG_RTW_REPEATER_SON_ID;
#ifdef CONFIG_RTW_REPEATER_SON_ROOT
dvobj->rson_data.hopcnt = RTW_RSON_HC_ROOT;
dvobj->rson_data.connectible = RTW_RSON_ALLOWCONNECT;
#else
dvobj->rson_data.hopcnt = RTW_RSON_HC_NOTREADY;
dvobj->rson_data.connectible = RTW_RSON_DENYCONNECT;
#endif
dvobj->rson_data.loading = 0;
_rtw_memset(dvobj->rson_data.res, 0xAA, sizeof(dvobj->rson_data.res));
}
void rtw_rson_get_property_str(_adapter *padapter, char *rson_data_str)
{
struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter);
sprintf(rson_data_str, "version : \t%d\nid : \t\t%08x\nhop count : \t%d\nconnectible : \t%s\nloading : \t%d\nreserve : \t%16ph\n",
pdvobj->rson_data.ver,
pdvobj->rson_data.id,
pdvobj->rson_data.hopcnt,
pdvobj->rson_data.connectible ? "connectable":"unconnectable",
pdvobj->rson_data.loading,
pdvobj->rson_data.res);
}
int str2hexbuf(char *str, u8 *hexbuf, int len)
{
u8 *p;
int i, slen, idx = 0;
p = (unsigned char *)str;
if ((*p != '0') || (*(p+1) != 'x'))
return _FALSE;
slen = strlen(str);
if (slen > (len*2) + 2)
return _FALSE;
p += 2;
for (i = 0 ; i < len; i++, idx = idx+2) {
hexbuf[i] = key_2char2num(p[idx], p[idx + 1]);
if (slen <= idx+2)
break;
}
return _TRUE;
}
int rtw_rson_set_property(_adapter *padapter, char *field, char *value)
{
struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter);
int num = 0;
if (_rtw_memcmp(field, (u8 *)"ver", 3) == _TRUE)
pdvobj->rson_data.ver = rtw_atoi(value);
else if (_rtw_memcmp(field, (u8 *)"id", 2) == _TRUE)
num = sscanf(value, "%08x", &(pdvobj->rson_data.id));
else if (_rtw_memcmp(field, (u8 *)"hc", 2) == _TRUE)
num = sscanf(value, "%hhu", &(pdvobj->rson_data.hopcnt));
else if (_rtw_memcmp(field, (u8 *)"cnt", 3) == _TRUE)
num = sscanf(value, "%hhu", &(pdvobj->rson_data.connectible));
else if (_rtw_memcmp(field, (u8 *)"loading", 2) == _TRUE)
num = sscanf(value, "%hhu", &(pdvobj->rson_data.loading));
else if (_rtw_memcmp(field, (u8 *)"res", 2) == _TRUE) {
str2hexbuf(value, pdvobj->rson_data.res, 16);
return 1;
} else
return _FALSE;
return num;
}
/*
return : TRUE -- competitor is taking advantage than condidate
FALSE -- we should continue keeping candidate
*/
int rtw_rson_choose(struct wlan_network **candidate, struct wlan_network *competitor)
{
s16 comp_score = 0, cand_score = 0;
struct rtw_rson_struct rson_cand, rson_comp;
if (is_match_bssid(competitor->network.MacAddress, rtw_rson_block_bssid, rtw_rson_block_bssid_idx) == _TRUE)
return _FALSE;
if ((competitor == NULL)
|| (rtw_get_rson_struct(&(competitor->network), &rson_comp) != _TRUE)
|| (rson_comp.id != CONFIG_RTW_REPEATER_SON_ID))
return _FALSE;
comp_score = rtw_cal_rson_score(&rson_comp, competitor->network.Rssi);
if (comp_score == RTW_RSON_SCORE_NOTCNNT)
return _FALSE;
if (*candidate == NULL)
return _TRUE;
if (rtw_get_rson_struct(&((*candidate)->network), &rson_cand) != _TRUE)
return _FALSE;
cand_score = rtw_cal_rson_score(&rson_cand, (*candidate)->network.Rssi);
RTW_INFO("%s: competitor_score=%d, candidate_score=%d\n", __func__, comp_score, cand_score);
if (comp_score - cand_score > RSON_SCORE_DIFF_TH)
return _TRUE;
return _FALSE;
}
inline u8 rtw_rson_varify_ie(u8 *p)
{
u8 *ptr = NULL;
u8 ver;
u32 id;
u8 hopcnt;
u8 allcnnt;
ptr = p + 2 + sizeof(RTW_RSON_OUI);
ver = *ptr;
/* for (ver == 1) */
if (ver != 1)
return _FALSE;
return _TRUE;
}
/*
Parsing RTK self-organization vendor IE
*/
int rtw_get_rson_struct(WLAN_BSSID_EX *bssid, struct rtw_rson_struct *rson_data)
{
sint limit = 0;
u32 len;
u8 *p;
if ((rson_data == NULL) || (bssid == NULL))
return -EINVAL;
/* Default */
rson_data->id = 0;
rson_data->ver = 0;
rson_data->hopcnt = 0;
rson_data->connectible = 0;
rson_data->loading = 0;
/* fake root */
if (is_match_bssid(bssid->MacAddress, rtw_rson_root_bssid, rtw_rson_root_bssid_idx) == _TRUE) {
rson_data->id = CONFIG_RTW_REPEATER_SON_ID;
rson_data->ver = RTW_RSON_VER;
rson_data->hopcnt = RTW_RSON_HC_ROOT;
rson_data->connectible = RTW_RSON_ALLOWCONNECT;
rson_data->loading = 0;
return _TRUE;
}
limit = bssid->IELength - _BEACON_IE_OFFSET_;
for (p = bssid->IEs + _BEACON_IE_OFFSET_; ; p += (len + 2)) {
p = rtw_get_ie(p, _VENDOR_SPECIFIC_IE_, &len, limit);
limit -= len;
if ((p == NULL) || (len == 0))
break;
if (p && (_rtw_memcmp(p + 2, RTW_RSON_OUI, sizeof(RTW_RSON_OUI)) == _TRUE)
&& rtw_rson_varify_ie(p)) {
p = p + 2 + sizeof(RTW_RSON_OUI);
rson_data->ver = *p;
/* for (ver == 1) */
p = p + 1;
rson_data->id = le32_to_cpup((__le32 *)p);
p = p + 4;
rson_data->hopcnt = *p;
p = p + 1;
rson_data->connectible = *p;
p = p + 1;
rson_data->loading = *p;
return _TRUE;
}
}
return -EBADMSG;
}
u32 rtw_rson_append_ie(_adapter *padapter, unsigned char *pframe, u32 *len)
{
u8 *ptr, *ori, ie_len = 0;
struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter);
struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
/* static int iii = 0;*/
if ((!pdvobj) || (!pframe))
return 0;
ptr = ori = pframe;
*ptr++ = _VENDOR_SPECIFIC_IE_;
*ptr++ = ie_len = sizeof(RTW_RSON_OUI)+sizeof(pdvobj->rson_data);
_rtw_memcpy(ptr, RTW_RSON_OUI, sizeof(RTW_RSON_OUI));
ptr = ptr + sizeof(RTW_RSON_OUI);
*ptr++ = pdvobj->rson_data.ver;
*(s32 *)ptr = cpu_to_le32(pdvobj->rson_data.id);
ptr = ptr + sizeof(pdvobj->rson_data.id);
*ptr++ = pdvobj->rson_data.hopcnt;
*ptr++ = pdvobj->rson_data.connectible;
*ptr++ = pdvobj->rson_data.loading;
_rtw_memcpy(ptr, pdvobj->rson_data.res, sizeof(pdvobj->rson_data.res));
pframe = ptr;
/*
iii = iii % 20;
if (iii++ == 0)
RTW_INFO("%s : RTW RSON IE : %20ph\n", __func__, ori);
*/
*len += (ie_len+2);
return ie_len;
}
void rtw_rson_do_disconnect(_adapter *padapter)
{
struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter);
RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter));
#ifndef CONFIG_RTW_REPEATER_SON_ROOT
pdvobj->rson_data.ver = RTW_RSON_VER;
pdvobj->rson_data.id = CONFIG_RTW_REPEATER_SON_ID;
pdvobj->rson_data.hopcnt = RTW_RSON_HC_NOTREADY;
pdvobj->rson_data.connectible = RTW_RSON_DENYCONNECT;
pdvobj->rson_data.loading = 0;
rtw_mi_tx_beacon_hdl(padapter);
#endif
}
void rtw_rson_join_done(_adapter *padapter)
{
struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter);
WLAN_BSSID_EX *cur_network = NULL;
struct rtw_rson_struct rson_data;
RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter));
if (!padapter->mlmepriv.cur_network_scanned)
return;
cur_network = &(padapter->mlmepriv.cur_network_scanned->network);
if (rtw_get_rson_struct(cur_network, &rson_data) != _TRUE) {
RTW_ERR("%s: try to join a improper network(%s)\n", __func__, cur_network->Ssid.Ssid);
return;
}
#ifndef CONFIG_RTW_REPEATER_SON_ROOT
/* update rson_data */
pdvobj->rson_data.ver = RTW_RSON_VER;
pdvobj->rson_data.id = rson_data.id;
pdvobj->rson_data.hopcnt = rson_data.hopcnt + 1;
pdvobj->rson_data.connectible = RTW_RSON_ALLOWCONNECT;
pdvobj->rson_data.loading = 0;
rtw_mi_tx_beacon_hdl(padapter);
#endif
}
int rtw_rson_isupdate_roamcan(struct mlme_priv *mlme
, struct wlan_network **candidate, struct wlan_network *competitor)
{
struct rtw_rson_struct rson_cand, rson_comp, rson_curr;
s16 comp_score, cand_score, curr_score;
if ((competitor == NULL)
|| (rtw_get_rson_struct(&(competitor->network), &rson_comp) != _TRUE)
|| (rson_comp.id != CONFIG_RTW_REPEATER_SON_ID))
return _FALSE;
if (is_match_bssid(competitor->network.MacAddress, rtw_rson_block_bssid, rtw_rson_block_bssid_idx) == _TRUE)
return _FALSE;
if ((!mlme->cur_network_scanned)
|| (mlme->cur_network_scanned == competitor)
|| (rtw_get_rson_struct(&(mlme->cur_network_scanned->network), &rson_curr)) != _TRUE)
return _FALSE;
if (rtw_get_passing_time_ms((u32)competitor->last_scanned) >= mlme->roam_scanr_exp_ms)
return _FALSE;
comp_score = rtw_cal_rson_score(&rson_comp, competitor->network.Rssi);
curr_score = rtw_cal_rson_score(&rson_curr, mlme->cur_network_scanned->network.Rssi);
if (comp_score - curr_score < RSON_SCORE_DIFF_TH)
return _FALSE;
if (*candidate == NULL)
return _TRUE;
if (rtw_get_rson_struct(&((*candidate)->network), &rson_cand) != _TRUE) {
RTW_ERR("%s : Unable to get rson_struct from candidate(%s -- " MAC_FMT")\n",
__func__, (*candidate)->network.Ssid.Ssid, MAC_ARG((*candidate)->network.MacAddress));
return _FALSE;
}
cand_score = rtw_cal_rson_score(&rson_cand, (*candidate)->network.Rssi);
RTW_DBG("comp_score=%d , cand_score=%d , curr_score=%d\n", comp_score, cand_score, curr_score);
if (cand_score < comp_score)
return _TRUE;
#if 0 /* Handle 11R protocol */
#ifdef CONFIG_RTW_80211R
if (rtw_chk_ft_flags(adapter, RTW_FT_SUPPORTED)) {
ptmp = rtw_get_ie(&competitor->network.IEs[12], _MDIE_, &mdie_len, competitor->network.IELength-12);
if (ptmp) {
if (!_rtw_memcmp(&pftpriv->mdid, ptmp+2, 2))
goto exit;
/*The candidate don't support over-the-DS*/
if (rtw_chk_ft_flags(adapter, RTW_FT_STA_OVER_DS_SUPPORTED)) {
if ((rtw_chk_ft_flags(adapter, RTW_FT_OVER_DS_SUPPORTED) && !(*(ptmp+4) & 0x01)) ||
(!rtw_chk_ft_flags(adapter, RTW_FT_OVER_DS_SUPPORTED) && (*(ptmp+4) & 0x01))) {
RTW_INFO("FT: ignore the candidate(" MAC_FMT ") for over-the-DS\n", MAC_ARG(competitor->network.MacAddress));
rtw_clr_ft_flags(adapter, RTW_FT_OVER_DS_SUPPORTED);
goto exit;
}
}
} else
goto exit;
}
#endif
#endif
return _FALSE;
}
void rtw_rson_show_survey_info(struct seq_file *m, _list *plist, _list *phead)
{
struct wlan_network *pnetwork = NULL;
struct rtw_rson_struct rson_data;
s16 rson_score;
u16 index = 0;
RTW_PRINT_SEL(m, "%5s %-17s %3s %5s %14s %10s %-3s %5s %32s\n", "index", "bssid", "ch", "id", "hop_cnt", "loading", "RSSI", "score", "ssid");
while (1) {
if (rtw_end_of_queue_search(phead, plist) == _TRUE)
break;
pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list);
if (!pnetwork)
break;
_rtw_memset(&rson_data, 0, sizeof(rson_data));
rson_score = 0;
if (rtw_get_rson_struct(&(pnetwork->network), &rson_data) == _TRUE)
rson_score = rtw_cal_rson_score(&rson_data, pnetwork->network.Rssi);
RTW_PRINT_SEL(m, "%5d "MAC_FMT" %3d 0x%08x %6d %10d %6d %6d %32s\n",
++index,
MAC_ARG(pnetwork->network.MacAddress),
pnetwork->network.Configuration.DSConfig,
rson_data.id,
rson_data.hopcnt,
rson_data.loading,
(int)pnetwork->network.Rssi,
rson_score,
pnetwork->network.Ssid.Ssid);
plist = get_next(plist);
}
}
/*
Description : As a AP role, We need to check the qualify of associating STA.
We also need to check if we are ready to be associated.
return : TRUE -- AP REJECT this STA
FALSE -- AP ACCEPT this STA
*/
u8 rtw_rson_ap_check_sta(_adapter *padapter, u8 *pframe, uint pkt_len, unsigned short ie_offset)
{
struct wlan_network *pnetwork = NULL;
struct rtw_rson_struct rson_target;
struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter);
int len = 0;
u8 ret = _FALSE;
u8 *p;
#ifndef CONFIG_RTW_REPEATER_SON_ROOT
_rtw_memset(&rson_target, 0, sizeof(rson_target));
for (p = pframe + WLAN_HDR_A3_LEN + ie_offset; ; p += (len + 2)) {
p = rtw_get_ie(p, _VENDOR_SPECIFIC_IE_, &len, pkt_len - WLAN_HDR_A3_LEN - ie_offset);
if ((p == NULL) || (len == 0))
break;
if (p && (_rtw_memcmp(p + 2, RTW_RSON_OUI, sizeof(RTW_RSON_OUI)) == _TRUE)
&& rtw_rson_varify_ie(p)) {
p = p + 2 + sizeof(RTW_RSON_OUI);
rson_target.ver = *p;
/* for (ver == 1) */
p = p + 1;
rson_target.id = le32_to_cpup((__le32 *)p);
p = p + 4;
rson_target.hopcnt = *p;
p = p + 1;
rson_target.connectible = *p;
p = p + 1;
rson_target.loading = *p;
break;
}
}
if (rson_target.id == 0) /* Normal STA, not a RSON STA */
ret = _FALSE;
else if (rson_target.id != pdvobj->rson_data.id) {
ret = _TRUE;
RTW_INFO("%s : Reject AssoReq because RSON ID not match, STA=%08x, our=%08x\n",
__func__, rson_target.id, pdvobj->rson_data.id);
} else if ((pdvobj->rson_data.hopcnt == RTW_RSON_HC_NOTREADY)
|| (pdvobj->rson_data.connectible == RTW_RSON_DENYCONNECT)) {
ret = _TRUE;
RTW_INFO("%s : Reject AssoReq becuase our hopcnt=%d or connectbile=%d\n",
__func__, pdvobj->rson_data.hopcnt, pdvobj->rson_data.connectible);
}
#endif
return ret;
}
u8 rtw_rson_scan_wk_cmd(_adapter *padapter, int op)
{
struct cmd_obj *ph2c;
struct drvextra_cmd_parm *pdrvextra_cmd_parm;
struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
u8 *extra_cmd_buf;
u8 res = _SUCCESS;
ph2c = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj));
if (ph2c == NULL) {
res = _FAIL;
goto exit;
}
pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm));
if (pdrvextra_cmd_parm == NULL) {
rtw_mfree((u8 *)ph2c, sizeof(struct cmd_obj));
res = _FAIL;
goto exit;
}
pdrvextra_cmd_parm->ec_id = RSON_SCAN_WK_CID;
pdrvextra_cmd_parm->type = op;
pdrvextra_cmd_parm->size = 0;
pdrvextra_cmd_parm->pbuf = NULL;
init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra));
res = rtw_enqueue_cmd(pcmdpriv, ph2c);
exit:
return res;
}
void rtw_rson_scan_cmd_hdl(_adapter *padapter, int op)
{
struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
u8 val8;
if (mlmeext_chk_scan_state(pmlmeext, SCAN_DISABLE) != _TRUE)
return;
if (op == RSON_SCAN_PROCESS) {
padapter->rtw_rson_scanstage = RSON_SCAN_PROCESS;
val8 = 0x1e;
rtw_hal_set_odm_var(padapter, HAL_ODM_INITIAL_GAIN, &val8, _FALSE);
val8 = 1;
rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8));
issue_probereq(padapter, NULL, NULL);
/* stop rson_scan after 100ms */
_set_timer(&(pmlmeext->rson_scan_timer), 100);
} else if (op == RSON_SCAN_DISABLE) {
padapter->rtw_rson_scanstage = RSON_SCAN_DISABLE;
val8 = 0;
rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8));
val8 = 0xff;
rtw_hal_set_odm_var(padapter, HAL_ODM_INITIAL_GAIN, &val8, _FALSE);
/* report_surveydone_event(padapter);*/
if (pmlmepriv->to_join == _TRUE) {
if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) != _TRUE) {
int s_ret;
set_fwstate(pmlmepriv, _FW_UNDER_LINKING);
pmlmepriv->to_join = _FALSE;
s_ret = rtw_select_and_join_from_scanned_queue(pmlmepriv);
if (s_ret == _SUCCESS)
_set_timer(&pmlmepriv->assoc_timer, MAX_JOIN_TIMEOUT);
else if (s_ret == 2) {
_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
rtw_indicate_connect(padapter);
} else {
RTW_INFO("try_to_join, but select scanning queue fail, to_roam:%d\n", rtw_to_roam(padapter));
if (rtw_to_roam(padapter) != 0) {
if (rtw_dec_to_roam(padapter) == 0) {
rtw_set_to_roam(padapter, 0);
rtw_free_assoc_resources(padapter, _TRUE);
rtw_indicate_disconnect(padapter, 0, _FALSE);
} else
pmlmepriv->to_join = _TRUE;
} else
rtw_indicate_disconnect(padapter, 0, _FALSE);
_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
}
}
} else {
if (rtw_chk_roam_flags(padapter, RTW_ROAM_ACTIVE)) {
if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)
&& check_fwstate(pmlmepriv, _FW_LINKED)) {
if (rtw_select_roaming_candidate(pmlmepriv) == _SUCCESS) {
#ifdef CONFIG_RTW_80211R
if (rtw_chk_ft_flags(padapter, RTW_FT_OVER_DS_SUPPORTED)) {
start_clnt_ft_action(adapter, (u8 *)pmlmepriv->roam_network->network.MacAddress);
} else {
/*wait a little time to retrieve packets buffered in the current ap while scan*/
_set_timer(&pmlmeext->ft_roam_timer, 30);
}
#else
receive_disconnect(padapter, pmlmepriv->cur_network.network.MacAddress
, WLAN_REASON_ACTIVE_ROAM, _FALSE);
#endif
}
}
}
issue_action_BSSCoexistPacket(padapter);
issue_action_BSSCoexistPacket(padapter);
issue_action_BSSCoexistPacket(padapter);
}
} else {
RTW_ERR("%s : improper parameter -- op = %d\n", __func__, op);
}
}
#endif /* CONFIG_RTW_REPEATER_SON */

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core/rtw_sdio.c Executable file
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/******************************************************************************
*
* Copyright(c) 2015 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#define _RTW_SDIO_C_
#include <drv_types.h> /* struct dvobj_priv and etc. */
#include <drv_types_sdio.h> /* RTW_SDIO_ADDR_CMD52_GEN */
/*
* Description:
* Use SDIO cmd52 or cmd53 to read/write data
*
* Parameters:
* d pointer of device object(struct dvobj_priv)
* addr SDIO address, 17 bits
* buf buffer for I/O
* len length
* write 0:read, 1:write
* cmd52 0:cmd52, 1:cmd53
*
* Return:
* _SUCCESS I/O ok.
* _FAIL I/O fail.
*/
static u8 sdio_io(struct dvobj_priv *d, u32 addr, void *buf, size_t len, u8 write, u8 cmd52)
{
#ifdef DBG_SDIO
#if (DBG_SDIO >= 3)
struct sdio_data *sdio;
#endif /* DBG_SDIO >= 3 */
#endif /* DBG_SDIO */
u32 addr_drv; /* address with driver defined bit */
int err;
u8 retry = 0;
u8 stop_retry = _FALSE; /* flag for stopping retry or not */
#ifdef DBG_SDIO
#if (DBG_SDIO >= 3)
sdio = &d->intf_data;
#endif /* DBG_SDIO >= 3 */
#endif /* DBG_SDIO */
if (rtw_is_surprise_removed(dvobj_get_primary_adapter(d))) {
RTW_ERR("%s: bSurpriseRemoved, skip %s 0x%05x, %zu bytes\n",
__FUNCTION__, write?"write":"read", addr, len);
return _FAIL;
}
addr_drv = addr;
if (cmd52)
addr_drv = RTW_SDIO_ADDR_CMD52_GEN(addr_drv);
do {
if (write)
err = d->intf_ops->write(d, addr_drv, buf, len, 0);
else
err = d->intf_ops->read(d, addr_drv, buf, len, 0);
if (!err) {
if (retry) {
RTW_INFO("%s: Retry %s OK! addr=0x%05x %zu bytes, retry=%u,%u\n",
__FUNCTION__, write?"write":"read",
addr, len, retry, ATOMIC_READ(&d->continual_io_error));
RTW_INFO_DUMP("Data: ", buf, len);
}
rtw_reset_continual_io_error(d);
break;
}
RTW_ERR("%s: %s FAIL! error(%d) addr=0x%05x %zu bytes, retry=%u,%u\n",
__FUNCTION__, write?"write":"read", err, addr, len,
retry, ATOMIC_READ(&d->continual_io_error));
#ifdef DBG_SDIO
#if (DBG_SDIO >= 3)
if (sdio->dbg_enable) {
if (sdio->err_test && sdio->err_test_triggered)
sdio->err_test = 0;
if (sdio->err_stop) {
RTW_ERR("%s: I/O error! Set surprise remove flag ON!\n",
__FUNCTION__);
rtw_set_surprise_removed(dvobj_get_primary_adapter(d));
return _FAIL;
}
}
#endif /* DBG_SDIO >= 3 */
#endif /* DBG_SDIO */
retry++;
stop_retry = rtw_inc_and_chk_continual_io_error(d);
if ((err == -1) || (stop_retry == _TRUE) || (retry > SD_IO_TRY_CNT)) {
/* critical error, unrecoverable */
RTW_ERR("%s: Fatal error! Set surprise remove flag ON! (retry=%u,%u)\n",
__FUNCTION__, retry, ATOMIC_READ(&d->continual_io_error));
rtw_set_surprise_removed(dvobj_get_primary_adapter(d));
return _FAIL;
}
/* WLAN IOREG or SDIO Local */
if ((addr & 0x10000) || !(addr & 0xE000)) {
RTW_WARN("%s: Retry %s addr=0x%05x %zu bytes, retry=%u,%u\n",
__FUNCTION__, write?"write":"read", addr, len,
retry, ATOMIC_READ(&d->continual_io_error));
continue;
}
return _FAIL;
} while (1);
return _SUCCESS;
}
u8 rtw_sdio_read_cmd52(struct dvobj_priv *d, u32 addr, void *buf, size_t len)
{
return sdio_io(d, addr, buf, len, 0, 1);
}
u8 rtw_sdio_read_cmd53(struct dvobj_priv *d, u32 addr, void *buf, size_t len)
{
return sdio_io(d, addr, buf, len, 0, 0);
}
u8 rtw_sdio_write_cmd52(struct dvobj_priv *d, u32 addr, void *buf, size_t len)
{
return sdio_io(d, addr, buf, len, 1, 1);
}
u8 rtw_sdio_write_cmd53(struct dvobj_priv *d, u32 addr, void *buf, size_t len)
{
return sdio_io(d, addr, buf, len, 1, 0);
}
u8 rtw_sdio_f0_read(struct dvobj_priv *d, u32 addr, void *buf, size_t len)
{
int err;
u8 ret;
ret = _SUCCESS;
addr = RTW_SDIO_ADDR_F0_GEN(addr);
err = d->intf_ops->read(d, addr, buf, len, 0);
if (err)
ret = _FAIL;
return ret;
}

3408
core/rtw_security.c Normal file
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311
core/rtw_sreset.c Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#include <drv_types.h>
#include <hal_data.h>
#include <rtw_sreset.h>
void sreset_init_value(_adapter *padapter)
{
#if defined(DBG_CONFIG_ERROR_DETECT)
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct sreset_priv *psrtpriv = &pHalData->srestpriv;
_rtw_mutex_init(&psrtpriv->silentreset_mutex);
psrtpriv->silent_reset_inprogress = _FALSE;
psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS;
psrtpriv->last_tx_time = 0;
psrtpriv->last_tx_complete_time = 0;
#endif
}
void sreset_reset_value(_adapter *padapter)
{
#if defined(DBG_CONFIG_ERROR_DETECT)
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct sreset_priv *psrtpriv = &pHalData->srestpriv;
psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS;
psrtpriv->last_tx_time = 0;
psrtpriv->last_tx_complete_time = 0;
#endif
}
u8 sreset_get_wifi_status(_adapter *padapter)
{
#if defined(DBG_CONFIG_ERROR_DETECT)
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct sreset_priv *psrtpriv = &pHalData->srestpriv;
u8 status = WIFI_STATUS_SUCCESS;
u32 val32 = 0;
if (psrtpriv->silent_reset_inprogress == _TRUE)
return status;
val32 = rtw_read32(padapter, REG_TXDMA_STATUS);
if (val32 == 0xeaeaeaea)
psrtpriv->Wifi_Error_Status = WIFI_IF_NOT_EXIST;
else if (val32 != 0) {
RTW_INFO("txdmastatu(%x)\n", val32);
psrtpriv->Wifi_Error_Status = WIFI_MAC_TXDMA_ERROR;
}
if (WIFI_STATUS_SUCCESS != psrtpriv->Wifi_Error_Status) {
RTW_INFO("==>%s error_status(0x%x)\n", __FUNCTION__, psrtpriv->Wifi_Error_Status);
status = (psrtpriv->Wifi_Error_Status & (~(USB_READ_PORT_FAIL | USB_WRITE_PORT_FAIL)));
}
RTW_INFO("==> %s wifi_status(0x%x)\n", __FUNCTION__, status);
/* status restore */
psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS;
return status;
#else
return WIFI_STATUS_SUCCESS;
#endif
}
void sreset_set_wifi_error_status(_adapter *padapter, u32 status)
{
#if defined(DBG_CONFIG_ERROR_DETECT)
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
pHalData->srestpriv.Wifi_Error_Status = status;
#endif
}
void sreset_set_trigger_point(_adapter *padapter, s32 tgp)
{
#if defined(DBG_CONFIG_ERROR_DETECT)
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
pHalData->srestpriv.dbg_trigger_point = tgp;
#endif
}
bool sreset_inprogress(_adapter *padapter)
{
#if defined(DBG_CONFIG_ERROR_RESET)
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
return pHalData->srestpriv.silent_reset_inprogress;
#else
return _FALSE;
#endif
}
void sreset_restore_security_station(_adapter *padapter)
{
struct mlme_priv *mlmepriv = &padapter->mlmepriv;
struct sta_priv *pstapriv = &padapter->stapriv;
struct sta_info *psta;
struct mlme_ext_info *pmlmeinfo = &padapter->mlmeextpriv.mlmext_info;
{
u8 val8;
if (pmlmeinfo->auth_algo == dot11AuthAlgrthm_8021X) {
val8 = 0xcc;
#ifdef CONFIG_WAPI_SUPPORT
} else if (padapter->wapiInfo.bWapiEnable && pmlmeinfo->auth_algo == dot11AuthAlgrthm_WAPI) {
/* Disable TxUseDefaultKey, RxUseDefaultKey, RxBroadcastUseDefaultKey. */
val8 = 0x4c;
#endif
} else
val8 = 0xcf;
rtw_hal_set_hwreg(padapter, HW_VAR_SEC_CFG, (u8 *)(&val8));
}
if ((padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_) ||
(padapter->securitypriv.dot11PrivacyAlgrthm == _AES_)) {
psta = rtw_get_stainfo(pstapriv, get_bssid(mlmepriv));
if (psta == NULL) {
/* DEBUG_ERR( ("Set wpa_set_encryption: Obtain Sta_info fail\n")); */
} else {
/* pairwise key */
rtw_setstakey_cmd(padapter, psta, UNICAST_KEY, _FALSE);
/* group key */
rtw_set_key(padapter, &padapter->securitypriv, padapter->securitypriv.dot118021XGrpKeyid, 0, _FALSE);
}
}
}
void sreset_restore_network_station(_adapter *padapter)
{
struct mlme_priv *mlmepriv = &padapter->mlmepriv;
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
u8 doiqk = _FALSE;
rtw_setopmode_cmd(padapter, Ndis802_11Infrastructure, RTW_CMDF_DIRECTLY);
{
u8 threshold;
#ifdef CONFIG_USB_HCI
/* TH=1 => means that invalidate usb rx aggregation */
/* TH=0 => means that validate usb rx aggregation, use init value. */
#ifdef CONFIG_80211N_HT
if (mlmepriv->htpriv.ht_option) {
if (padapter->registrypriv.wifi_spec == 1)
threshold = 1;
else
threshold = 0;
rtw_hal_set_hwreg(padapter, HW_VAR_RXDMA_AGG_PG_TH, (u8 *)(&threshold));
} else {
threshold = 1;
rtw_hal_set_hwreg(padapter, HW_VAR_RXDMA_AGG_PG_TH, (u8 *)(&threshold));
}
#endif /* CONFIG_80211N_HT */
#endif
}
doiqk = _TRUE;
rtw_hal_set_hwreg(padapter, HW_VAR_DO_IQK , &doiqk);
set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode);
doiqk = _FALSE;
rtw_hal_set_hwreg(padapter , HW_VAR_DO_IQK , &doiqk);
/* disable dynamic functions, such as high power, DIG */
/*rtw_phydm_func_disable_all(padapter);*/
rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, pmlmeinfo->network.MacAddress);
{
u8 join_type = 0;
rtw_hal_rcr_set_chk_bssid(padapter, MLME_STA_CONNECTING);
rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type));
}
Set_MSR(padapter, (pmlmeinfo->state & 0x3));
mlmeext_joinbss_event_callback(padapter, 1);
/* restore Sequence No. */
rtw_hal_set_hwreg(padapter, HW_VAR_RESTORE_HW_SEQ, 0);
sreset_restore_security_station(padapter);
}
void sreset_restore_network_status(_adapter *padapter)
{
struct mlme_priv *mlmepriv = &padapter->mlmepriv;
if (check_fwstate(mlmepriv, WIFI_STATION_STATE)) {
RTW_INFO(FUNC_ADPT_FMT" fwstate:0x%08x - WIFI_STATION_STATE\n", FUNC_ADPT_ARG(padapter), get_fwstate(mlmepriv));
sreset_restore_network_station(padapter);
} else if (MLME_IS_AP(padapter) || MLME_IS_MESH(padapter)) {
RTW_INFO(FUNC_ADPT_FMT" %s\n", FUNC_ADPT_ARG(padapter), MLME_IS_AP(padapter) ? "AP" : "MESH");
rtw_ap_restore_network(padapter);
} else if (check_fwstate(mlmepriv, WIFI_ADHOC_STATE))
RTW_INFO(FUNC_ADPT_FMT" fwstate:0x%08x - WIFI_ADHOC_STATE\n", FUNC_ADPT_ARG(padapter), get_fwstate(mlmepriv));
else
RTW_INFO(FUNC_ADPT_FMT" fwstate:0x%08x - ???\n", FUNC_ADPT_ARG(padapter), get_fwstate(mlmepriv));
}
void sreset_stop_adapter(_adapter *padapter)
{
struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
if (padapter == NULL)
return;
RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter));
rtw_netif_stop_queue(padapter->pnetdev);
rtw_cancel_all_timer(padapter);
/* TODO: OS and HCI independent */
#if defined(PLATFORM_LINUX) && defined(CONFIG_USB_HCI)
tasklet_kill(&pxmitpriv->xmit_tasklet);
#endif
if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY))
rtw_scan_abort(padapter);
if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING)) {
rtw_set_to_roam(padapter, 0);
rtw_join_timeout_handler(padapter);
}
}
void sreset_start_adapter(_adapter *padapter)
{
struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
if (padapter == NULL)
return;
RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter));
if (check_fwstate(pmlmepriv, _FW_LINKED))
sreset_restore_network_status(padapter);
/* TODO: OS and HCI independent */
#if defined(PLATFORM_LINUX) && defined(CONFIG_USB_HCI)
tasklet_hi_schedule(&pxmitpriv->xmit_tasklet);
#endif
if (is_primary_adapter(padapter))
_set_timer(&adapter_to_dvobj(padapter)->dynamic_chk_timer, 2000);
rtw_netif_wake_queue(padapter->pnetdev);
}
void sreset_reset(_adapter *padapter)
{
#ifdef DBG_CONFIG_ERROR_RESET
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct sreset_priv *psrtpriv = &pHalData->srestpriv;
struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter);
struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
_irqL irqL;
systime start = rtw_get_current_time();
struct dvobj_priv *psdpriv = padapter->dvobj;
struct debug_priv *pdbgpriv = &psdpriv->drv_dbg;
RTW_INFO("%s\n", __FUNCTION__);
psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS;
#ifdef CONFIG_LPS
rtw_set_ps_mode(padapter, PS_MODE_ACTIVE, 0, 0, "SRESET");
#endif/* #ifdef CONFIG_LPS */
_enter_pwrlock(&pwrpriv->lock);
psrtpriv->silent_reset_inprogress = _TRUE;
pwrpriv->change_rfpwrstate = rf_off;
rtw_mi_sreset_adapter_hdl(padapter, _FALSE);/*sreset_stop_adapter*/
#ifdef CONFIG_IPS
_ips_enter(padapter);
_ips_leave(padapter);
#endif
rtw_mi_sreset_adapter_hdl(padapter, _TRUE);/*sreset_start_adapter*/
psrtpriv->silent_reset_inprogress = _FALSE;
_exit_pwrlock(&pwrpriv->lock);
RTW_INFO("%s done in %d ms\n", __FUNCTION__, rtw_get_passing_time_ms(start));
pdbgpriv->dbg_sreset_cnt++;
psrtpriv->self_dect_fw = _FALSE;
psrtpriv->rx_cnt = 0;
#endif
}

1345
core/rtw_sta_mgt.c Normal file
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3509
core/rtw_tdls.c Normal file
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1136
core/rtw_vht.c Normal file
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1320
core/rtw_wapi.c Normal file
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922
core/rtw_wapi_sms4.c Normal file
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/******************************************************************************
*
* Copyright(c) 2016 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifdef CONFIG_WAPI_SUPPORT
#include <linux/unistd.h>
#include <linux/etherdevice.h>
#include <drv_types.h>
#include <rtw_wapi.h>
#ifdef CONFIG_WAPI_SW_SMS4
#define WAPI_LITTLE_ENDIAN
/* #define BIG_ENDIAN */
#define ENCRYPT 0
#define DECRYPT 1
/**********************************************************
**********************************************************/
const u8 Sbox[256] = {
0xd6, 0x90, 0xe9, 0xfe, 0xcc, 0xe1, 0x3d, 0xb7, 0x16, 0xb6, 0x14, 0xc2, 0x28, 0xfb, 0x2c, 0x05,
0x2b, 0x67, 0x9a, 0x76, 0x2a, 0xbe, 0x04, 0xc3, 0xaa, 0x44, 0x13, 0x26, 0x49, 0x86, 0x06, 0x99,
0x9c, 0x42, 0x50, 0xf4, 0x91, 0xef, 0x98, 0x7a, 0x33, 0x54, 0x0b, 0x43, 0xed, 0xcf, 0xac, 0x62,
0xe4, 0xb3, 0x1c, 0xa9, 0xc9, 0x08, 0xe8, 0x95, 0x80, 0xdf, 0x94, 0xfa, 0x75, 0x8f, 0x3f, 0xa6,
0x47, 0x07, 0xa7, 0xfc, 0xf3, 0x73, 0x17, 0xba, 0x83, 0x59, 0x3c, 0x19, 0xe6, 0x85, 0x4f, 0xa8,
0x68, 0x6b, 0x81, 0xb2, 0x71, 0x64, 0xda, 0x8b, 0xf8, 0xeb, 0x0f, 0x4b, 0x70, 0x56, 0x9d, 0x35,
0x1e, 0x24, 0x0e, 0x5e, 0x63, 0x58, 0xd1, 0xa2, 0x25, 0x22, 0x7c, 0x3b, 0x01, 0x21, 0x78, 0x87,
0xd4, 0x00, 0x46, 0x57, 0x9f, 0xd3, 0x27, 0x52, 0x4c, 0x36, 0x02, 0xe7, 0xa0, 0xc4, 0xc8, 0x9e,
0xea, 0xbf, 0x8a, 0xd2, 0x40, 0xc7, 0x38, 0xb5, 0xa3, 0xf7, 0xf2, 0xce, 0xf9, 0x61, 0x15, 0xa1,
0xe0, 0xae, 0x5d, 0xa4, 0x9b, 0x34, 0x1a, 0x55, 0xad, 0x93, 0x32, 0x30, 0xf5, 0x8c, 0xb1, 0xe3,
0x1d, 0xf6, 0xe2, 0x2e, 0x82, 0x66, 0xca, 0x60, 0xc0, 0x29, 0x23, 0xab, 0x0d, 0x53, 0x4e, 0x6f,
0xd5, 0xdb, 0x37, 0x45, 0xde, 0xfd, 0x8e, 0x2f, 0x03, 0xff, 0x6a, 0x72, 0x6d, 0x6c, 0x5b, 0x51,
0x8d, 0x1b, 0xaf, 0x92, 0xbb, 0xdd, 0xbc, 0x7f, 0x11, 0xd9, 0x5c, 0x41, 0x1f, 0x10, 0x5a, 0xd8,
0x0a, 0xc1, 0x31, 0x88, 0xa5, 0xcd, 0x7b, 0xbd, 0x2d, 0x74, 0xd0, 0x12, 0xb8, 0xe5, 0xb4, 0xb0,
0x89, 0x69, 0x97, 0x4a, 0x0c, 0x96, 0x77, 0x7e, 0x65, 0xb9, 0xf1, 0x09, 0xc5, 0x6e, 0xc6, 0x84,
0x18, 0xf0, 0x7d, 0xec, 0x3a, 0xdc, 0x4d, 0x20, 0x79, 0xee, 0x5f, 0x3e, 0xd7, 0xcb, 0x39, 0x48
};
const u32 CK[32] = {
0x00070e15, 0x1c232a31, 0x383f464d, 0x545b6269,
0x70777e85, 0x8c939aa1, 0xa8afb6bd, 0xc4cbd2d9,
0xe0e7eef5, 0xfc030a11, 0x181f262d, 0x343b4249,
0x50575e65, 0x6c737a81, 0x888f969d, 0xa4abb2b9,
0xc0c7ced5, 0xdce3eaf1, 0xf8ff060d, 0x141b2229,
0x30373e45, 0x4c535a61, 0x686f767d, 0x848b9299,
0xa0a7aeb5, 0xbcc3cad1, 0xd8dfe6ed, 0xf4fb0209,
0x10171e25, 0x2c333a41, 0x484f565d, 0x646b7279
};
#define Rotl(_x, _y) (((_x) << (_y)) | ((_x) >> (32 - (_y))))
#define ByteSub(_A) (Sbox[(_A) >> 24 & 0xFF] << 24 | \
Sbox[(_A) >> 16 & 0xFF] << 16 | \
Sbox[(_A) >> 8 & 0xFF] << 8 | \
Sbox[(_A) & 0xFF])
#define L1(_B) ((_B) ^ Rotl(_B, 2) ^ Rotl(_B, 10) ^ Rotl(_B, 18) ^ Rotl(_B, 24))
#define L2(_B) ((_B) ^ Rotl(_B, 13) ^ Rotl(_B, 23))
static void
xor_block(void *dst, void *src1, void *src2)
/* 128-bit xor: *dst = *src1 xor *src2. Pointers must be 32-bit aligned */
{
((u32 *)dst)[0] = ((u32 *)src1)[0] ^ ((u32 *)src2)[0];
((u32 *)dst)[1] = ((u32 *)src1)[1] ^ ((u32 *)src2)[1];
((u32 *)dst)[2] = ((u32 *)src1)[2] ^ ((u32 *)src2)[2];
((u32 *)dst)[3] = ((u32 *)src1)[3] ^ ((u32 *)src2)[3];
}
void SMS4Crypt(u8 *Input, u8 *Output, u32 *rk)
{
u32 r, mid, x0, x1, x2, x3, *p;
p = (u32 *)Input;
x0 = p[0];
x1 = p[1];
x2 = p[2];
x3 = p[3];
#ifdef WAPI_LITTLE_ENDIAN
x0 = Rotl(x0, 16);
x0 = ((x0 & 0x00FF00FF) << 8) | ((x0 & 0xFF00FF00) >> 8);
x1 = Rotl(x1, 16);
x1 = ((x1 & 0x00FF00FF) << 8) | ((x1 & 0xFF00FF00) >> 8);
x2 = Rotl(x2, 16);
x2 = ((x2 & 0x00FF00FF) << 8) | ((x2 & 0xFF00FF00) >> 8);
x3 = Rotl(x3, 16);
x3 = ((x3 & 0x00FF00FF) << 8) | ((x3 & 0xFF00FF00) >> 8);
#endif
for (r = 0; r < 32; r += 4) {
mid = x1 ^ x2 ^ x3 ^ rk[r + 0];
mid = ByteSub(mid);
x0 ^= L1(mid);
mid = x2 ^ x3 ^ x0 ^ rk[r + 1];
mid = ByteSub(mid);
x1 ^= L1(mid);
mid = x3 ^ x0 ^ x1 ^ rk[r + 2];
mid = ByteSub(mid);
x2 ^= L1(mid);
mid = x0 ^ x1 ^ x2 ^ rk[r + 3];
mid = ByteSub(mid);
x3 ^= L1(mid);
}
#ifdef WAPI_LITTLE_ENDIAN
x0 = Rotl(x0, 16);
x0 = ((x0 & 0x00FF00FF) << 8) | ((x0 & 0xFF00FF00) >> 8);
x1 = Rotl(x1, 16);
x1 = ((x1 & 0x00FF00FF) << 8) | ((x1 & 0xFF00FF00) >> 8);
x2 = Rotl(x2, 16);
x2 = ((x2 & 0x00FF00FF) << 8) | ((x2 & 0xFF00FF00) >> 8);
x3 = Rotl(x3, 16);
x3 = ((x3 & 0x00FF00FF) << 8) | ((x3 & 0xFF00FF00) >> 8);
#endif
p = (u32 *)Output;
p[0] = x3;
p[1] = x2;
p[2] = x1;
p[3] = x0;
}
void SMS4KeyExt(u8 *Key, u32 *rk, u32 CryptFlag)
{
u32 r, mid, x0, x1, x2, x3, *p;
p = (u32 *)Key;
x0 = p[0];
x1 = p[1];
x2 = p[2];
x3 = p[3];
#ifdef WAPI_LITTLE_ENDIAN
x0 = Rotl(x0, 16);
x0 = ((x0 & 0xFF00FF) << 8) | ((x0 & 0xFF00FF00) >> 8);
x1 = Rotl(x1, 16);
x1 = ((x1 & 0xFF00FF) << 8) | ((x1 & 0xFF00FF00) >> 8);
x2 = Rotl(x2, 16);
x2 = ((x2 & 0xFF00FF) << 8) | ((x2 & 0xFF00FF00) >> 8);
x3 = Rotl(x3, 16);
x3 = ((x3 & 0xFF00FF) << 8) | ((x3 & 0xFF00FF00) >> 8);
#endif
x0 ^= 0xa3b1bac6;
x1 ^= 0x56aa3350;
x2 ^= 0x677d9197;
x3 ^= 0xb27022dc;
for (r = 0; r < 32; r += 4) {
mid = x1 ^ x2 ^ x3 ^ CK[r + 0];
mid = ByteSub(mid);
rk[r + 0] = x0 ^= L2(mid);
mid = x2 ^ x3 ^ x0 ^ CK[r + 1];
mid = ByteSub(mid);
rk[r + 1] = x1 ^= L2(mid);
mid = x3 ^ x0 ^ x1 ^ CK[r + 2];
mid = ByteSub(mid);
rk[r + 2] = x2 ^= L2(mid);
mid = x0 ^ x1 ^ x2 ^ CK[r + 3];
mid = ByteSub(mid);
rk[r + 3] = x3 ^= L2(mid);
}
if (CryptFlag == DECRYPT) {
for (r = 0; r < 16; r++)
mid = rk[r], rk[r] = rk[31 - r], rk[31 - r] = mid;
}
}
void WapiSMS4Cryption(u8 *Key, u8 *IV, u8 *Input, u16 InputLength,
u8 *Output, u16 *OutputLength, u32 CryptFlag)
{
u32 blockNum, i, j, rk[32];
u16 remainder;
u8 blockIn[16], blockOut[16], tempIV[16], k;
*OutputLength = 0;
remainder = InputLength & 0x0F;
blockNum = InputLength >> 4;
if (remainder != 0)
blockNum++;
else
remainder = 16;
for (k = 0; k < 16; k++)
tempIV[k] = IV[15 - k];
memcpy(blockIn, tempIV, 16);
SMS4KeyExt((u8 *)Key, rk, CryptFlag);
for (i = 0; i < blockNum - 1; i++) {
SMS4Crypt((u8 *)blockIn, blockOut, rk);
xor_block(&Output[i * 16], &Input[i * 16], blockOut);
memcpy(blockIn, blockOut, 16);
}
*OutputLength = i * 16;
SMS4Crypt((u8 *)blockIn, blockOut, rk);
for (j = 0; j < remainder; j++)
Output[i * 16 + j] = Input[i * 16 + j] ^ blockOut[j];
*OutputLength += remainder;
}
void WapiSMS4Encryption(u8 *Key, u8 *IV, u8 *Input, u16 InputLength,
u8 *Output, u16 *OutputLength)
{
WapiSMS4Cryption(Key, IV, Input, InputLength, Output, OutputLength, ENCRYPT);
}
void WapiSMS4Decryption(u8 *Key, u8 *IV, u8 *Input, u16 InputLength,
u8 *Output, u16 *OutputLength)
{
/* OFB mode: is also ENCRYPT flag */
WapiSMS4Cryption(Key, IV, Input, InputLength, Output, OutputLength, ENCRYPT);
}
void WapiSMS4CalculateMic(u8 *Key, u8 *IV, u8 *Input1, u8 Input1Length,
u8 *Input2, u16 Input2Length, u8 *Output, u8 *OutputLength)
{
u32 blockNum, i, remainder, rk[32];
u8 BlockIn[16], BlockOut[16], TempBlock[16], tempIV[16], k;
*OutputLength = 0;
remainder = Input1Length & 0x0F;
blockNum = Input1Length >> 4;
for (k = 0; k < 16; k++)
tempIV[k] = IV[15 - k];
memcpy(BlockIn, tempIV, 16);
SMS4KeyExt((u8 *)Key, rk, ENCRYPT);
SMS4Crypt((u8 *)BlockIn, BlockOut, rk);
for (i = 0; i < blockNum; i++) {
xor_block(BlockIn, (Input1 + i * 16), BlockOut);
SMS4Crypt((u8 *)BlockIn, BlockOut, rk);
}
if (remainder != 0) {
memset(TempBlock, 0, 16);
memcpy(TempBlock, (Input1 + blockNum * 16), remainder);
xor_block(BlockIn, TempBlock, BlockOut);
SMS4Crypt((u8 *)BlockIn, BlockOut, rk);
}
remainder = Input2Length & 0x0F;
blockNum = Input2Length >> 4;
for (i = 0; i < blockNum; i++) {
xor_block(BlockIn, (Input2 + i * 16), BlockOut);
SMS4Crypt((u8 *)BlockIn, BlockOut, rk);
}
if (remainder != 0) {
memset(TempBlock, 0, 16);
memcpy(TempBlock, (Input2 + blockNum * 16), remainder);
xor_block(BlockIn, TempBlock, BlockOut);
SMS4Crypt((u8 *)BlockIn, BlockOut, rk);
}
memcpy(Output, BlockOut, 16);
*OutputLength = 16;
}
void SecCalculateMicSMS4(
u8 KeyIdx,
u8 *MicKey,
u8 *pHeader,
u8 *pData,
u16 DataLen,
u8 *MicBuffer
)
{
#if 0
struct ieee80211_hdr_3addr_qos *header;
u8 TempBuf[34], TempLen = 32, MicLen, QosOffset, *IV;
u16 *pTemp, fc;
WAPI_TRACE(WAPI_TX | WAPI_RX, "=========>%s\n", __FUNCTION__);
header = (struct ieee80211_hdr_3addr_qos *)pHeader;
memset(TempBuf, 0, 34);
memcpy(TempBuf, pHeader, 2); /* FrameCtrl */
pTemp = (u16 *)TempBuf;
*pTemp &= 0xc78f; /* bit4,5,6,11,12,13 */
memcpy((TempBuf + 2), (pHeader + 4), 12); /* Addr1, Addr2 */
memcpy((TempBuf + 14), (pHeader + 22), 2); /* SeqCtrl */
pTemp = (u16 *)(TempBuf + 14);
*pTemp &= 0x000f;
memcpy((TempBuf + 16), (pHeader + 16), 6); /* Addr3 */
fc = le16_to_cpu(header->frame_ctl);
if (GetFrDs((u16 *)&fc) && GetToDs((u16 *)&fc)) {
memcpy((TempBuf + 22), (pHeader + 24), 6);
QosOffset = 30;
} else {
memset((TempBuf + 22), 0, 6);
QosOffset = 24;
}
if ((fc & 0x0088) == 0x0088) {
memcpy((TempBuf + 28), (pHeader + QosOffset), 2);
TempLen += 2;
/* IV = pHeader + QosOffset + 2 + SNAP_SIZE + sizeof(u16) + 2; */
IV = pHeader + QosOffset + 2 + 2;
} else {
IV = pHeader + QosOffset + 2;
/* IV = pHeader + QosOffset + SNAP_SIZE + sizeof(u16) + 2; */
}
TempBuf[TempLen - 1] = (u8)(DataLen & 0xff);
TempBuf[TempLen - 2] = (u8)((DataLen & 0xff00) >> 8);
TempBuf[TempLen - 4] = KeyIdx;
WAPI_DATA(WAPI_TX, "CalculateMic - KEY", MicKey, 16);
WAPI_DATA(WAPI_TX, "CalculateMic - IV", IV, 16);
WAPI_DATA(WAPI_TX, "CalculateMic - TempBuf", TempBuf, TempLen);
WAPI_DATA(WAPI_TX, "CalculateMic - pData", pData, DataLen);
WapiSMS4CalculateMic(MicKey, IV, TempBuf, TempLen,
pData, DataLen, MicBuffer, &MicLen);
if (MicLen != 16)
WAPI_TRACE(WAPI_ERR, "%s: MIC Length Error!!\n", __FUNCTION__);
WAPI_TRACE(WAPI_TX | WAPI_RX, "<=========%s\n", __FUNCTION__);
#endif
}
/* AddCount: 1 or 2.
* If overflow, return 1,
* else return 0.
*/
u8 WapiIncreasePN(u8 *PN, u8 AddCount)
{
u8 i;
if (NULL == PN)
return 1;
/* YJ,test,091102 */
/*
if(AddCount == 2){
RTW_INFO("############################%s(): PN[0]=0x%x\n", __FUNCTION__, PN[0]);
if(PN[0] == 0x48){
PN[0] += AddCount;
return 1;
}else{
PN[0] += AddCount;
return 0;
}
}
*/
/* YJ,test,091102,end */
for (i = 0; i < 16; i++) {
if (PN[i] + AddCount <= 0xff) {
PN[i] += AddCount;
return 0;
} else {
PN[i] += AddCount;
AddCount = 1;
}
}
return 1;
}
void WapiGetLastRxUnicastPNForQoSData(
u8 UserPriority,
PRT_WAPI_STA_INFO pWapiStaInfo,
u8 *PNOut
)
{
WAPI_TRACE(WAPI_RX, "===========> %s\n", __FUNCTION__);
switch (UserPriority) {
case 0:
case 3:
memcpy(PNOut, pWapiStaInfo->lastRxUnicastPNBEQueue, 16);
break;
case 1:
case 2:
memcpy(PNOut, pWapiStaInfo->lastRxUnicastPNBKQueue, 16);
break;
case 4:
case 5:
memcpy(PNOut, pWapiStaInfo->lastRxUnicastPNVIQueue, 16);
break;
case 6:
case 7:
memcpy(PNOut, pWapiStaInfo->lastRxUnicastPNVOQueue, 16);
break;
default:
WAPI_TRACE(WAPI_ERR, "%s: Unknown TID\n", __FUNCTION__);
break;
}
WAPI_TRACE(WAPI_RX, "<=========== %s\n", __FUNCTION__);
}
void WapiSetLastRxUnicastPNForQoSData(
u8 UserPriority,
u8 *PNIn,
PRT_WAPI_STA_INFO pWapiStaInfo
)
{
WAPI_TRACE(WAPI_RX, "===========> %s\n", __FUNCTION__);
switch (UserPriority) {
case 0:
case 3:
memcpy(pWapiStaInfo->lastRxUnicastPNBEQueue, PNIn, 16);
break;
case 1:
case 2:
memcpy(pWapiStaInfo->lastRxUnicastPNBKQueue, PNIn, 16);
break;
case 4:
case 5:
memcpy(pWapiStaInfo->lastRxUnicastPNVIQueue, PNIn, 16);
break;
case 6:
case 7:
memcpy(pWapiStaInfo->lastRxUnicastPNVOQueue, PNIn, 16);
break;
default:
WAPI_TRACE(WAPI_ERR, "%s: Unknown TID\n", __FUNCTION__);
break;
}
WAPI_TRACE(WAPI_RX, "<=========== %s\n", __FUNCTION__);
}
/****************************************************************************
FALSE not RX-Reorder
TRUE do RX Reorder
add to support WAPI to N-mode
*****************************************************************************/
u8 WapiCheckPnInSwDecrypt(
_adapter *padapter,
struct sk_buff *pskb
)
{
u8 ret = false;
#if 0
struct ieee80211_hdr_3addr_qos *header;
u16 fc;
u8 *pDaddr, *pTaddr, *pRaddr;
header = (struct ieee80211_hdr_3addr_qos *)pskb->data;
pTaddr = header->addr2;
pRaddr = header->addr1;
fc = le16_to_cpu(header->frame_ctl);
if (GetToDs(&fc))
pDaddr = header->addr3;
else
pDaddr = header->addr1;
if ((_rtw_memcmp(pRaddr, padapter->pnetdev->dev_addr, ETH_ALEN) == 0)
&& !(pDaddr)
&& (GetFrameType(&fc) == WIFI_QOS_DATA_TYPE))
/* && ieee->pHTInfo->bCurrentHTSupport && */
/* ieee->pHTInfo->bCurRxReorderEnable) */
ret = false;
else
ret = true;
#endif
WAPI_TRACE(WAPI_RX, "%s: return %d\n", __FUNCTION__, ret);
return ret;
}
int SecSMS4HeaderFillIV(_adapter *padapter, u8 *pxmitframe)
{
struct pkt_attrib *pattrib = &((struct xmit_frame *)pxmitframe)->attrib;
u8 *frame = ((struct xmit_frame *)pxmitframe)->buf_addr + TXDESC_OFFSET;
u8 *pSecHeader = NULL, *pos = NULL, *pRA = NULL;
u8 bPNOverflow = false, bFindMatchPeer = false, hdr_len = 0;
PWLAN_HEADER_WAPI_EXTENSION pWapiExt = NULL;
PRT_WAPI_T pWapiInfo = &padapter->wapiInfo;
PRT_WAPI_STA_INFO pWapiSta = NULL;
int ret = 0;
WAPI_TRACE(WAPI_TX, "=========>%s\n", __FUNCTION__);
return ret;
#if 0
hdr_len = sMacHdrLng;
if (GetFrameType(pskb->data) == WIFI_QOS_DATA_TYPE)
hdr_len += 2;
/* hdr_len += SNAP_SIZE + sizeof(u16); */
pos = skb_push(pskb, padapter->wapiInfo.extra_prefix_len);
memmove(pos, pos + padapter->wapiInfo.extra_prefix_len, hdr_len);
pSecHeader = pskb->data + hdr_len;
pWapiExt = (PWLAN_HEADER_WAPI_EXTENSION)pSecHeader;
pRA = pskb->data + 4;
WAPI_DATA(WAPI_TX, "FillIV - Before Fill IV", pskb->data, pskb->len);
/* Address 1 is always receiver's address */
if (IS_MCAST(pRA)) {
if (!pWapiInfo->wapiTxMsk.bTxEnable) {
WAPI_TRACE(WAPI_ERR, "%s: bTxEnable = 0!!\n", __FUNCTION__);
return -2;
}
if (pWapiInfo->wapiTxMsk.keyId <= 1) {
pWapiExt->KeyIdx = pWapiInfo->wapiTxMsk.keyId;
pWapiExt->Reserved = 0;
bPNOverflow = WapiIncreasePN(pWapiInfo->lastTxMulticastPN, 1);
memcpy(pWapiExt->PN, pWapiInfo->lastTxMulticastPN, 16);
if (bPNOverflow) {
/* Update MSK Notification. */
WAPI_TRACE(WAPI_ERR, "===============>%s():multicast PN overflow\n", __FUNCTION__);
rtw_wapi_app_event_handler(padapter, NULL, 0, pRA, false, false, true, 0, false);
}
} else {
WAPI_TRACE(WAPI_ERR, "%s: Invalid Wapi Multicast KeyIdx!!\n", __FUNCTION__);
ret = -3;
}
} else {
list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) {
if (!memcmp(pWapiSta->PeerMacAddr, pRA, 6)) {
bFindMatchPeer = true;
break;
}
}
if (bFindMatchPeer) {
if ((!pWapiSta->wapiUskUpdate.bTxEnable) && (!pWapiSta->wapiUsk.bTxEnable)) {
WAPI_TRACE(WAPI_ERR, "%s: bTxEnable = 0!!\n", __FUNCTION__);
return -4;
}
if (pWapiSta->wapiUsk.keyId <= 1) {
if (pWapiSta->wapiUskUpdate.bTxEnable)
pWapiExt->KeyIdx = pWapiSta->wapiUskUpdate.keyId;
else
pWapiExt->KeyIdx = pWapiSta->wapiUsk.keyId;
pWapiExt->Reserved = 0;
bPNOverflow = WapiIncreasePN(pWapiSta->lastTxUnicastPN, 2);
memcpy(pWapiExt->PN, pWapiSta->lastTxUnicastPN, 16);
if (bPNOverflow) {
/* Update USK Notification. */
WAPI_TRACE(WAPI_ERR, "===============>%s():unicast PN overflow\n", __FUNCTION__);
rtw_wapi_app_event_handler(padapter, NULL, 0, pWapiSta->PeerMacAddr, false, true, false, 0, false);
}
} else {
WAPI_TRACE(WAPI_ERR, "%s: Invalid Wapi Unicast KeyIdx!!\n", __FUNCTION__);
ret = -5;
}
} else {
WAPI_TRACE(WAPI_ERR, "%s: Can not find Peer Sta "MAC_FMT"!!\n", __FUNCTION__, MAC_ARG(pRA));
ret = -6;
}
}
WAPI_DATA(WAPI_TX, "FillIV - After Fill IV", pskb->data, pskb->len);
WAPI_TRACE(WAPI_TX, "<=========%s\n", __FUNCTION__);
return ret;
#endif
}
/* WAPI SW Enc: must have done Coalesce! */
void SecSWSMS4Encryption(
_adapter *padapter,
u8 *pxmitframe
)
{
PRT_WAPI_T pWapiInfo = &padapter->wapiInfo;
PRT_WAPI_STA_INFO pWapiSta = NULL;
u8 *pframe = ((struct xmit_frame *)pxmitframe)->buf_addr + TXDESC_SIZE;
struct pkt_attrib *pattrib = &((struct xmit_frame *)pxmitframe)->attrib;
u8 *SecPtr = NULL, *pRA, *pMicKey = NULL, *pDataKey = NULL, *pIV = NULL;
u8 IVOffset, DataOffset, bFindMatchPeer = false, KeyIdx = 0, MicBuffer[16];
u16 OutputLength;
WAPI_TRACE(WAPI_TX, "=========>%s\n", __FUNCTION__);
WAPI_TRACE(WAPI_TX, "hdrlen: %d\n", pattrib->hdrlen);
return;
DataOffset = pattrib->hdrlen + pattrib->iv_len;
pRA = pframe + 4;
if (IS_MCAST(pRA)) {
KeyIdx = pWapiInfo->wapiTxMsk.keyId;
pIV = pWapiInfo->lastTxMulticastPN;
pMicKey = pWapiInfo->wapiTxMsk.micKey;
pDataKey = pWapiInfo->wapiTxMsk.dataKey;
} else {
if (!list_empty(&(pWapiInfo->wapiSTAUsedList))) {
list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) {
if (0 == memcmp(pWapiSta->PeerMacAddr, pRA, 6)) {
bFindMatchPeer = true;
break;
}
}
if (bFindMatchPeer) {
if (pWapiSta->wapiUskUpdate.bTxEnable) {
KeyIdx = pWapiSta->wapiUskUpdate.keyId;
WAPI_TRACE(WAPI_TX, "%s(): Use update USK!! KeyIdx=%d\n", __FUNCTION__, KeyIdx);
pIV = pWapiSta->lastTxUnicastPN;
pMicKey = pWapiSta->wapiUskUpdate.micKey;
pDataKey = pWapiSta->wapiUskUpdate.dataKey;
} else {
KeyIdx = pWapiSta->wapiUsk.keyId;
WAPI_TRACE(WAPI_TX, "%s(): Use USK!! KeyIdx=%d\n", __FUNCTION__, KeyIdx);
pIV = pWapiSta->lastTxUnicastPN;
pMicKey = pWapiSta->wapiUsk.micKey;
pDataKey = pWapiSta->wapiUsk.dataKey;
}
} else {
WAPI_TRACE(WAPI_ERR, "%s: Can not find Peer Sta!!\n", __FUNCTION__);
return;
}
} else {
WAPI_TRACE(WAPI_ERR, "%s: wapiSTAUsedList is empty!!\n", __FUNCTION__);
return;
}
}
SecPtr = pframe;
SecCalculateMicSMS4(KeyIdx, pMicKey, SecPtr, (SecPtr + DataOffset), pattrib->pktlen, MicBuffer);
WAPI_DATA(WAPI_TX, "Encryption - MIC", MicBuffer, padapter->wapiInfo.extra_postfix_len);
memcpy(pframe + pattrib->hdrlen + pattrib->iv_len + pattrib->pktlen - pattrib->icv_len,
(u8 *)MicBuffer,
padapter->wapiInfo.extra_postfix_len
);
WapiSMS4Encryption(pDataKey, pIV, (SecPtr + DataOffset), pattrib->pktlen + pattrib->icv_len, (SecPtr + DataOffset), &OutputLength);
WAPI_DATA(WAPI_TX, "Encryption - After SMS4 encryption", pframe, pattrib->hdrlen + pattrib->iv_len + pattrib->pktlen);
WAPI_TRACE(WAPI_TX, "<=========%s\n", __FUNCTION__);
}
u8 SecSWSMS4Decryption(
_adapter *padapter,
u8 *precv_frame,
struct recv_priv *precv_priv
)
{
PRT_WAPI_T pWapiInfo = &padapter->wapiInfo;
struct recv_frame_hdr *precv_hdr;
PRT_WAPI_STA_INFO pWapiSta = NULL;
u8 IVOffset, DataOffset, bFindMatchPeer = false, bUseUpdatedKey = false;
u8 KeyIdx, MicBuffer[16], lastRxPNforQoS[16];
u8 *pRA, *pTA, *pMicKey, *pDataKey, *pLastRxPN, *pRecvPN, *pSecData, *pRecvMic, *pos;
u8 TID = 0;
u16 OutputLength, DataLen;
u8 bQosData;
struct sk_buff *pskb;
WAPI_TRACE(WAPI_RX, "=========>%s\n", __FUNCTION__);
return 0;
precv_hdr = &((union recv_frame *)precv_frame)->u.hdr;
pskb = (struct sk_buff *)(precv_hdr->rx_data);
precv_hdr->bWapiCheckPNInDecrypt = WapiCheckPnInSwDecrypt(padapter, pskb);
WAPI_TRACE(WAPI_RX, "=========>%s: check PN %d\n", __FUNCTION__, precv_hdr->bWapiCheckPNInDecrypt);
WAPI_DATA(WAPI_RX, "Decryption - Before decryption", pskb->data, pskb->len);
IVOffset = sMacHdrLng;
bQosData = GetFrameType(pskb->data) == WIFI_QOS_DATA_TYPE;
if (bQosData)
IVOffset += 2;
/* if(GetHTC()) */
/* IVOffset += 4; */
/* IVOffset += SNAP_SIZE + sizeof(u16); */
DataOffset = IVOffset + padapter->wapiInfo.extra_prefix_len;
pRA = pskb->data + 4;
pTA = pskb->data + 10;
KeyIdx = *(pskb->data + IVOffset);
pRecvPN = pskb->data + IVOffset + 2;
pSecData = pskb->data + DataOffset;
DataLen = pskb->len - DataOffset;
pRecvMic = pskb->data + pskb->len - padapter->wapiInfo.extra_postfix_len;
TID = GetTid(pskb->data);
if (!list_empty(&(pWapiInfo->wapiSTAUsedList))) {
list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) {
if (0 == memcmp(pWapiSta->PeerMacAddr, pTA, 6)) {
bFindMatchPeer = true;
break;
}
}
}
if (!bFindMatchPeer) {
WAPI_TRACE(WAPI_ERR, "%s: Can not find Peer Sta "MAC_FMT" for Key Info!!!\n", __FUNCTION__, MAC_ARG(pTA));
return false;
}
if (IS_MCAST(pRA)) {
WAPI_TRACE(WAPI_RX, "%s: Multicast decryption !!!\n", __FUNCTION__);
if (pWapiSta->wapiMsk.keyId == KeyIdx && pWapiSta->wapiMsk.bSet) {
pLastRxPN = pWapiSta->lastRxMulticastPN;
if (!WapiComparePN(pRecvPN, pLastRxPN)) {
WAPI_TRACE(WAPI_ERR, "%s: MSK PN is not larger than last, Dropped!!!\n", __FUNCTION__);
WAPI_DATA(WAPI_ERR, "pRecvPN:", pRecvPN, 16);
WAPI_DATA(WAPI_ERR, "pLastRxPN:", pLastRxPN, 16);
return false;
}
memcpy(pLastRxPN, pRecvPN, 16);
pMicKey = pWapiSta->wapiMsk.micKey;
pDataKey = pWapiSta->wapiMsk.dataKey;
} else if (pWapiSta->wapiMskUpdate.keyId == KeyIdx && pWapiSta->wapiMskUpdate.bSet) {
WAPI_TRACE(WAPI_RX, "%s: Use Updated MSK for Decryption !!!\n", __FUNCTION__);
bUseUpdatedKey = true;
memcpy(pWapiSta->lastRxMulticastPN, pRecvPN, 16);
pMicKey = pWapiSta->wapiMskUpdate.micKey;
pDataKey = pWapiSta->wapiMskUpdate.dataKey;
} else {
WAPI_TRACE(WAPI_ERR, "%s: Can not find MSK with matched KeyIdx(%d), Dropped !!!\n", __FUNCTION__, KeyIdx);
return false;
}
} else {
WAPI_TRACE(WAPI_RX, "%s: Unicast decryption !!!\n", __FUNCTION__);
if (pWapiSta->wapiUsk.keyId == KeyIdx && pWapiSta->wapiUsk.bSet) {
WAPI_TRACE(WAPI_RX, "%s: Use USK for Decryption!!!\n", __FUNCTION__);
if (precv_hdr->bWapiCheckPNInDecrypt) {
if (GetFrameType(pskb->data) == WIFI_QOS_DATA_TYPE) {
WapiGetLastRxUnicastPNForQoSData(TID, pWapiSta, lastRxPNforQoS);
pLastRxPN = lastRxPNforQoS;
} else
pLastRxPN = pWapiSta->lastRxUnicastPN;
if (!WapiComparePN(pRecvPN, pLastRxPN))
return false;
if (bQosData)
WapiSetLastRxUnicastPNForQoSData(TID, pRecvPN, pWapiSta);
else
memcpy(pWapiSta->lastRxUnicastPN, pRecvPN, 16);
} else
memcpy(precv_hdr->WapiTempPN, pRecvPN, 16);
if (check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE)) {
if ((pRecvPN[0] & 0x1) == 0) {
WAPI_TRACE(WAPI_ERR, "%s: Rx USK PN is not odd when Infra STA mode, Dropped !!!\n", __FUNCTION__);
return false;
}
}
pMicKey = pWapiSta->wapiUsk.micKey;
pDataKey = pWapiSta->wapiUsk.dataKey;
} else if (pWapiSta->wapiUskUpdate.keyId == KeyIdx && pWapiSta->wapiUskUpdate.bSet) {
WAPI_TRACE(WAPI_RX, "%s: Use Updated USK for Decryption!!!\n", __FUNCTION__);
if (pWapiSta->bAuthenticatorInUpdata)
bUseUpdatedKey = true;
else
bUseUpdatedKey = false;
if (bQosData)
WapiSetLastRxUnicastPNForQoSData(TID, pRecvPN, pWapiSta);
else
memcpy(pWapiSta->lastRxUnicastPN, pRecvPN, 16);
pMicKey = pWapiSta->wapiUskUpdate.micKey;
pDataKey = pWapiSta->wapiUskUpdate.dataKey;
} else {
WAPI_TRACE(WAPI_ERR, "%s: No valid USK!!!KeyIdx=%d pWapiSta->wapiUsk.keyId=%d pWapiSta->wapiUskUpdate.keyId=%d\n", __FUNCTION__, KeyIdx, pWapiSta->wapiUsk.keyId,
pWapiSta->wapiUskUpdate.keyId);
/* dump_buf(pskb->data,pskb->len); */
return false;
}
}
WAPI_DATA(WAPI_RX, "Decryption - DataKey", pDataKey, 16);
WAPI_DATA(WAPI_RX, "Decryption - IV", pRecvPN, 16);
WapiSMS4Decryption(pDataKey, pRecvPN, pSecData, DataLen, pSecData, &OutputLength);
if (OutputLength != DataLen)
WAPI_TRACE(WAPI_ERR, "%s: Output Length Error!!!!\n", __FUNCTION__);
WAPI_DATA(WAPI_RX, "Decryption - After decryption", pskb->data, pskb->len);
DataLen -= padapter->wapiInfo.extra_postfix_len;
SecCalculateMicSMS4(KeyIdx, pMicKey, pskb->data, pSecData, DataLen, MicBuffer);
WAPI_DATA(WAPI_RX, "Decryption - MIC received", pRecvMic, SMS4_MIC_LEN);
WAPI_DATA(WAPI_RX, "Decryption - MIC calculated", MicBuffer, SMS4_MIC_LEN);
if (0 == memcmp(MicBuffer, pRecvMic, padapter->wapiInfo.extra_postfix_len)) {
WAPI_TRACE(WAPI_RX, "%s: Check MIC OK!!\n", __FUNCTION__);
if (bUseUpdatedKey) {
/* delete the old key */
if (IS_MCAST(pRA)) {
WAPI_TRACE(WAPI_API, "%s(): AE use new update MSK!!\n", __FUNCTION__);
pWapiSta->wapiMsk.keyId = pWapiSta->wapiMskUpdate.keyId;
memcpy(pWapiSta->wapiMsk.dataKey, pWapiSta->wapiMskUpdate.dataKey, 16);
memcpy(pWapiSta->wapiMsk.micKey, pWapiSta->wapiMskUpdate.micKey, 16);
pWapiSta->wapiMskUpdate.bTxEnable = pWapiSta->wapiMskUpdate.bSet = false;
} else {
WAPI_TRACE(WAPI_API, "%s(): AE use new update USK!!\n", __FUNCTION__);
pWapiSta->wapiUsk.keyId = pWapiSta->wapiUskUpdate.keyId;
memcpy(pWapiSta->wapiUsk.dataKey, pWapiSta->wapiUskUpdate.dataKey, 16);
memcpy(pWapiSta->wapiUsk.micKey, pWapiSta->wapiUskUpdate.micKey, 16);
pWapiSta->wapiUskUpdate.bTxEnable = pWapiSta->wapiUskUpdate.bSet = false;
}
}
} else {
WAPI_TRACE(WAPI_ERR, "%s: Check MIC Error, Dropped !!!!\n", __FUNCTION__);
return false;
}
pos = pskb->data;
memmove(pos + padapter->wapiInfo.extra_prefix_len, pos, IVOffset);
skb_pull(pskb, padapter->wapiInfo.extra_prefix_len);
WAPI_TRACE(WAPI_RX, "<=========%s\n", __FUNCTION__);
return true;
}
u32 rtw_sms4_encrypt(_adapter *padapter, u8 *pxmitframe)
{
u8 *pframe;
u32 res = _SUCCESS;
WAPI_TRACE(WAPI_TX, "=========>%s\n", __FUNCTION__);
if ((!padapter->WapiSupport) || (!padapter->wapiInfo.bWapiEnable)) {
WAPI_TRACE(WAPI_TX, "<========== %s, WAPI not supported or enabled!\n", __FUNCTION__);
return _FAIL;
}
if (((struct xmit_frame *)pxmitframe)->buf_addr == NULL)
return _FAIL;
pframe = ((struct xmit_frame *)pxmitframe)->buf_addr + TXDESC_OFFSET;
SecSWSMS4Encryption(padapter, pxmitframe);
WAPI_TRACE(WAPI_TX, "<=========%s\n", __FUNCTION__);
return res;
}
u32 rtw_sms4_decrypt(_adapter *padapter, u8 *precvframe)
{
u8 *pframe;
u32 res = _SUCCESS;
WAPI_TRACE(WAPI_RX, "=========>%s\n", __FUNCTION__);
if ((!padapter->WapiSupport) || (!padapter->wapiInfo.bWapiEnable)) {
WAPI_TRACE(WAPI_RX, "<========== %s, WAPI not supported or enabled!\n", __FUNCTION__);
return _FAIL;
}
/* drop packet when hw decrypt fail
* return tempraily */
return _FAIL;
/* pframe=(unsigned char *)((union recv_frame*)precvframe)->u.hdr.rx_data; */
if (false == SecSWSMS4Decryption(padapter, precvframe, &padapter->recvpriv)) {
WAPI_TRACE(WAPI_ERR, "%s():SMS4 decrypt frame error\n", __FUNCTION__);
return _FAIL;
}
WAPI_TRACE(WAPI_RX, "<=========%s\n", __FUNCTION__);
return res;
}
#else
u32 rtw_sms4_encrypt(_adapter *padapter, u8 *pxmitframe)
{
WAPI_TRACE(WAPI_TX, "=========>Dummy %s\n", __FUNCTION__);
WAPI_TRACE(WAPI_TX, "<=========Dummy %s\n", __FUNCTION__);
return _SUCCESS;
}
u32 rtw_sms4_decrypt(_adapter *padapter, u8 *precvframe)
{
WAPI_TRACE(WAPI_RX, "=========>Dummy %s\n", __FUNCTION__);
WAPI_TRACE(WAPI_RX, "<=========Dummy %s\n", __FUNCTION__);
return _SUCCESS;
}
#endif
#endif

5003
core/rtw_wlan_util.c Executable file
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6092
core/rtw_xmit.c Normal file
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185
hal/HalPwrSeqCmd.c Normal file
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@ -0,0 +1,185 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
/*++
Copyright (c) Realtek Semiconductor Corp. All rights reserved.
Module Name:
HalPwrSeqCmd.c
Abstract:
Implement HW Power sequence configuration CMD handling routine for Realtek devices.
Major Change History:
When Who What
---------- --------------- -------------------------------
2011-10-26 Lucas Modify to be compatible with SD4-CE driver.
2011-07-07 Roger Create.
--*/
#include <HalPwrSeqCmd.h>
/*
* Description:
* This routine deal with the Power Configuration CMDs parsing for RTL8723/RTL8188E Series IC.
*
* Assumption:
* We should follow specific format which was released from HW SD.
*
* 2011.07.07, added by Roger.
* */
u8 HalPwrSeqCmdParsing(
PADAPTER padapter,
u8 CutVersion,
u8 FabVersion,
u8 InterfaceType,
WLAN_PWR_CFG PwrSeqCmd[])
{
WLAN_PWR_CFG PwrCfgCmd = {0};
u8 bPollingBit = _FALSE;
u8 bHWICSupport = _FALSE;
u32 AryIdx = 0;
u8 value = 0;
u32 offset = 0;
u8 flag = 0;
u32 pollingCount = 0; /* polling autoload done. */
u32 maxPollingCnt = 5000;
do {
PwrCfgCmd = PwrSeqCmd[AryIdx];
/* 2 Only Handle the command whose FAB, CUT, and Interface are matched */
if ((GET_PWR_CFG_FAB_MASK(PwrCfgCmd) & FabVersion) &&
(GET_PWR_CFG_CUT_MASK(PwrCfgCmd) & CutVersion) &&
(GET_PWR_CFG_INTF_MASK(PwrCfgCmd) & InterfaceType)) {
switch (GET_PWR_CFG_CMD(PwrCfgCmd)) {
case PWR_CMD_READ:
break;
case PWR_CMD_WRITE:
offset = GET_PWR_CFG_OFFSET(PwrCfgCmd);
#ifdef CONFIG_SDIO_HCI
/* */
/* <Roger_Notes> We should deal with interface specific address mapping for some interfaces, e.g., SDIO interface */
/* 2011.07.07. */
/* */
if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO) {
/* Read Back SDIO Local value */
value = SdioLocalCmd52Read1Byte(padapter, offset);
value &= ~(GET_PWR_CFG_MASK(PwrCfgCmd));
value |= (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd));
/* Write Back SDIO Local value */
SdioLocalCmd52Write1Byte(padapter, offset, value);
} else
#endif
{
#ifdef CONFIG_GSPI_HCI
if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO)
offset = SPI_LOCAL_OFFSET | offset;
#endif
/* Read the value from system register */
value = rtw_read8(padapter, offset);
value = value & (~(GET_PWR_CFG_MASK(PwrCfgCmd)));
value = value | (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd));
/* Write the value back to sytem register */
rtw_write8(padapter, offset, value);
}
break;
case PWR_CMD_POLLING:
bPollingBit = _FALSE;
offset = GET_PWR_CFG_OFFSET(PwrCfgCmd);
rtw_hal_get_hwreg(padapter, HW_VAR_PWR_CMD, &bHWICSupport);
if (bHWICSupport && offset == 0x06) {
flag = 0;
maxPollingCnt = 100000;
} else
maxPollingCnt = 5000;
#ifdef CONFIG_GSPI_HCI
if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO)
offset = SPI_LOCAL_OFFSET | offset;
#endif
do {
#ifdef CONFIG_SDIO_HCI
if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO)
value = SdioLocalCmd52Read1Byte(padapter, offset);
else
#endif
value = rtw_read8(padapter, offset);
value = value & GET_PWR_CFG_MASK(PwrCfgCmd);
if (value == (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd)))
bPollingBit = _TRUE;
else
rtw_udelay_os(10);
if (pollingCount++ > maxPollingCnt) {
RTW_ERR("HalPwrSeqCmdParsing: Fail to polling Offset[%#x]=%02x\n", offset, value);
/* For PCIE + USB package poll power bit timeout issue only modify 8821AE and 8723BE */
if (bHWICSupport && offset == 0x06 && flag == 0) {
RTW_ERR("[WARNING] PCIE polling(0x%X) timeout(%d), Toggle 0x04[3] and try again.\n", offset, maxPollingCnt);
if (IS_HARDWARE_TYPE_8723DE(padapter))
PlatformEFIOWrite1Byte(padapter, 0x40, (PlatformEFIORead1Byte(padapter, 0x40)) & (~BIT3));
PlatformEFIOWrite1Byte(padapter, 0x04, PlatformEFIORead1Byte(padapter, 0x04) | BIT3);
PlatformEFIOWrite1Byte(padapter, 0x04, PlatformEFIORead1Byte(padapter, 0x04) & ~BIT3);
if (IS_HARDWARE_TYPE_8723DE(padapter))
PlatformEFIOWrite1Byte(padapter, 0x40, PlatformEFIORead1Byte(padapter, 0x40)|BIT3);
/* Retry Polling Process one more time */
pollingCount = 0;
flag = 1;
} else {
return _FALSE;
}
}
} while (!bPollingBit);
break;
case PWR_CMD_DELAY:
if (GET_PWR_CFG_VALUE(PwrCfgCmd) == PWRSEQ_DELAY_US)
rtw_udelay_os(GET_PWR_CFG_OFFSET(PwrCfgCmd));
else
rtw_udelay_os(GET_PWR_CFG_OFFSET(PwrCfgCmd) * 1000);
break;
case PWR_CMD_END:
/* When this command is parsed, end the process */
return _TRUE;
break;
default:
break;
}
}
AryIdx++;/* Add Array Index */
} while (1);
return _TRUE;
}

53
hal/btc/btc_basic_types.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __BTC_BASIC_TYPES_H__
#define __BTC_BASIC_TYPES_H__
#define IN
#define OUT
#define VOID void
typedef void *PVOID;
#define u1Byte u8
#define pu1Byte u8*
#define u2Byte u16
#define pu2Byte u16*
#define u4Byte u32
#define pu4Byte u32*
#define u8Byte u64
#define pu8Byte u64*
#define s1Byte s8
#define ps1Byte s8*
#define s2Byte s16
#define ps2Byte s16*
#define s4Byte s32
#define ps4Byte s32*
#define s8Byte s64
#define ps8Byte s64*
#define UCHAR u8
#define USHORT u16
#define UINT u32
#define ULONG u32
#define PULONG u32*
#endif /* __BTC_BASIC_TYPES_H__ */

538
hal/btc/halbtc8822c.c Executable file
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/******************************************************************************
*
* Copyright(c) 2016 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#include "mp_precomp.h"
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
static u8 *trace_buf = &gl_btc_trace_buf[0];
static const u32 bt_desired_ver_8822c = 0xd;
/* rssi express in percentage % (dbm = % - 100) */
static const u8 wl_rssi_step_8822c[] = {60, 50, 44, 30};
static const u8 bt_rssi_step_8822c[] = {8, 15, 20, 25};
/* Shared-Antenna Coex Table */
static const struct btc_coex_table_para table_sant_8822c[] = {
{0xffffffff, 0xffffffff}, /*case-0*/
{0x55555555, 0x55555555},
{0x66555555, 0x66555555},
{0xaaaaaaaa, 0xaaaaaaaa},
{0x5a5a5a5a, 0x5a5a5a5a},
{0xfafafafa, 0xfafafafa}, /*case-5*/
{0x6a5a6a5a, 0xaaaaaaaa},
{0x6a5a56aa, 0x6a5a56aa},
{0x6a5a5a5a, 0x6a5a5a5a},
{0x66555555, 0x5a5a5a5a},
{0x66555555, 0x6a5a5a5a}, /*case-10*/
{0x66555555, 0xfafafafa},
{0x66555555, 0x6a5a5aaa},
{0x66555555, 0x5aaa5aaa},
{0x66555555, 0xaaaa5aaa},
{0x66555555, 0xaaaaaaaa}, /*case-15*/
{0xffff55ff, 0xfafafafa},
{0xffff55ff, 0x6afa5afa},
{0xaaffffaa, 0xfafafafa},
{0xaa5555aa, 0x5a5a5a5a},
{0xaa5555aa, 0x6a5a5a5a}, /*case-20*/
{0xaa5555aa, 0xaaaaaaaa},
{0xffffffff, 0x5a5a5a5a},
{0xffffffff, 0x6a5a5a5a},
{0xffffffff, 0x55555555},
{0xffffffff, 0x6a5a5aaa}, /*case-25*/
{0x55555555, 0x5a5a5a5a},
{0x55555555, 0xaaaaaaaa},
{0x55555555, 0x6a5a6a5a},
{0x66556655, 0x66556655} };
/* Non-Shared-Antenna Coex Table */
static const struct btc_coex_table_para table_nsant_8822c[] = {
{0xffffffff, 0xffffffff}, /*case-100*/
{0x55555555, 0x55555555},
{0x66555555, 0x66555555},
{0xaaaaaaaa, 0xaaaaaaaa},
{0x5a5a5a5a, 0x5a5a5a5a},
{0xfafafafa, 0xfafafafa}, /*case-105*/
{0x5afa5afa, 0x5afa5afa},
{0x55555555, 0xfafafafa},
{0x66555555, 0xfafafafa},
{0x66555555, 0x5a5a5a5a},
{0x66555555, 0x6a5a5a5a}, /*case-110*/
{0x66555555, 0xaaaaaaaa},
{0xffff55ff, 0xfafafafa},
{0xffff55ff, 0x5afa5afa},
{0xffff55ff, 0xaaaaaaaa},
{0xaaffffaa, 0xfafafafa}, /*case-115*/
{0xaaffffaa, 0x5afa5afa},
{0xaaffffaa, 0xaaaaaaaa},
{0xffffffff, 0xfafafafa},
{0xffffffff, 0x5afa5afa},
{0xffffffff, 0xaaaaaaaa},/*case-120*/
{0x55ff55ff, 0x5afa5afa},
{0x55ff55ff, 0xaaaaaaaa},
{0x55ff55ff, 0x55ff55ff} };
/* Shared-Antenna TDMA*/
static const struct btc_tdma_para tdma_sant_8822c[] = {
{ {0x00, 0x00, 0x00, 0x00, 0x00} }, /*case-0*/
{ {0x61, 0x45, 0x03, 0x11, 0x11} }, /*case-1*/
{ {0x61, 0x3a, 0x03, 0x11, 0x11} },
{ {0x61, 0x30, 0x03, 0x11, 0x11} },
{ {0x61, 0x20, 0x03, 0x11, 0x11} },
{ {0x61, 0x10, 0x03, 0x11, 0x11} }, /*case-5*/
{ {0x61, 0x45, 0x03, 0x11, 0x10} },
{ {0x61, 0x3a, 0x03, 0x11, 0x10} },
{ {0x61, 0x30, 0x03, 0x11, 0x10} },
{ {0x61, 0x20, 0x03, 0x11, 0x10} },
{ {0x61, 0x10, 0x03, 0x11, 0x10} }, /*case-10*/
{ {0x61, 0x08, 0x03, 0x11, 0x14} },
{ {0x61, 0x08, 0x03, 0x10, 0x14} },
{ {0x51, 0x08, 0x03, 0x10, 0x54} },
{ {0x51, 0x08, 0x03, 0x10, 0x55} },
{ {0x51, 0x08, 0x07, 0x10, 0x54} }, /*case-15*/
{ {0x51, 0x45, 0x03, 0x10, 0x50} },
{ {0x51, 0x3a, 0x03, 0x10, 0x50} },
{ {0x51, 0x30, 0x03, 0x10, 0x50} },
{ {0x51, 0x20, 0x03, 0x10, 0x50} },
{ {0x51, 0x10, 0x03, 0x10, 0x50} }, /*case-20*/
{ {0x51, 0x4a, 0x03, 0x10, 0x50} },
{ {0x51, 0x0c, 0x03, 0x10, 0x54} },
{ {0x55, 0x08, 0x03, 0x10, 0x54} },
{ {0x65, 0x10, 0x03, 0x11, 0x11} },
{ {0x51, 0x10, 0x03, 0x10, 0x51} } };
/* Non-Shared-Antenna TDMA*/
static const struct btc_tdma_para tdma_nsant_8822c[] = {
{ {0x00, 0x00, 0x00, 0x00, 0x00} }, /*case-100*/
{ {0x61, 0x45, 0x03, 0x11, 0x11} }, /*case-101*/
{ {0x61, 0x3a, 0x03, 0x11, 0x11} },
{ {0x61, 0x30, 0x03, 0x11, 0x11} },
{ {0x61, 0x20, 0x03, 0x11, 0x11} },
{ {0x61, 0x10, 0x03, 0x11, 0x11} }, /*case-105*/
{ {0x61, 0x45, 0x03, 0x11, 0x10} },
{ {0x61, 0x3a, 0x03, 0x11, 0x10} },
{ {0x61, 0x30, 0x03, 0x11, 0x10} },
{ {0x61, 0x20, 0x03, 0x11, 0x10} },
{ {0x61, 0x10, 0x03, 0x11, 0x10} }, /*case-110*/
{ {0x61, 0x08, 0x03, 0x11, 0x14} },
{ {0x61, 0x08, 0x03, 0x10, 0x14} },
{ {0x51, 0x08, 0x03, 0x10, 0x54} },
{ {0x51, 0x08, 0x03, 0x10, 0x55} },
{ {0x51, 0x08, 0x07, 0x10, 0x54} }, /*case-115*/
{ {0x51, 0x45, 0x03, 0x10, 0x50} },
{ {0x51, 0x3a, 0x03, 0x10, 0x50} },
{ {0x51, 0x30, 0x03, 0x10, 0x50} },
{ {0x51, 0x20, 0x03, 0x10, 0x50} },
{ {0x51, 0x10, 0x03, 0x10, 0x50} } };
/* wl_tx_dec_power, bt_tx_dec_power, wl_rx_gain, bt_rx_lna_constrain */
static const struct btc_rf_para rf_para_tx_8822c[] = {
{0, 0, FALSE, 7}, /* for normal */
{0, 16, FALSE, 7}, /* for WL-CPT */
{8, 17, TRUE, 4},
{7, 18, TRUE, 4},
{6, 19, TRUE, 4},
{5, 20, TRUE, 4} };
static const struct btc_rf_para rf_para_rx_8822c[] = {
{0, 0, FALSE, 7}, /* for normal */
{0, 16, FALSE, 7}, /* for WL-CPT */
{3, 24, TRUE, 5},
{2, 26, TRUE, 5},
{1, 27, TRUE, 5},
{0, 28, TRUE, 5} };
const struct btc_5g_afh_map afh_5g_8822c[] = { {0, 0, 0} };
const struct btc_chip_para btc_chip_para_8822c = {
"8822c", /*.chip_name */
20190531, /*.para_ver_date */
0xe, /*.para_ver */
0xd, /* bt_desired_ver */
TRUE, /* scbd_support */
TRUE, /* mailbox_support*/
TRUE, /* lte_indirect_access */
TRUE, /* new_scbd10_def */
BTC_INDIRECT_1700, /* indirect_type */
BTC_PSTDMA_FORCE_LPSOFF, /* pstdma_type */
BTC_BTRSSI_DBM, /* bt_rssi_type */
15, /*.ant_isolation */
2, /*.rssi_tolerance */
2, /* rx_path_num */
ARRAY_SIZE(wl_rssi_step_8822c), /*.wl_rssi_step_num */
wl_rssi_step_8822c, /*.wl_rssi_step */
ARRAY_SIZE(bt_rssi_step_8822c), /*.bt_rssi_step_num */
bt_rssi_step_8822c, /*.bt_rssi_step */
ARRAY_SIZE(table_sant_8822c), /*.table_sant_num */
table_sant_8822c, /*.table_sant = */
ARRAY_SIZE(table_nsant_8822c), /*.table_nsant_num */
table_nsant_8822c, /*.table_nsant = */
ARRAY_SIZE(tdma_sant_8822c), /*.tdma_sant_num */
tdma_sant_8822c, /*.tdma_sant = */
ARRAY_SIZE(tdma_nsant_8822c), /*.tdma_nsant_num */
tdma_nsant_8822c, /*.tdma_nsant */
ARRAY_SIZE(rf_para_tx_8822c), /* wl_rf_para_tx_num */
rf_para_tx_8822c, /* wl_rf_para_tx */
rf_para_rx_8822c, /* wl_rf_para_rx */
0x24, /*.bt_afh_span_bw20 */
0x36, /*.bt_afh_span_bw40 */
ARRAY_SIZE(afh_5g_8822c), /*.afh_5g_num */
afh_5g_8822c, /*.afh_5g */
halbtc8822c_chip_setup /* chip_setup function */
};
void halbtc8822c_cfg_init(struct btc_coexist *btc)
{
u8 u8tmp = 0;
/* enable TBTT nterrupt */
btc->btc_write_1byte_bitmask(btc, 0x550, 0x8, 0x1);
/* BT report packet sample rate */
/* 0x790[5:0]=0x5 */
btc->btc_write_1byte(btc, 0x790, 0x5);
/* Enable BT counter statistics */
btc->btc_write_1byte(btc, 0x778, 0x1);
/* Enable PTA (3-wire function form BT side) */
btc->btc_write_1byte_bitmask(btc, 0x40, 0x20, 0x1);
btc->btc_write_1byte_bitmask(btc, 0x41, 0x02, 0x1);
/* Enable PTA (tx/rx signal form WiFi side) */
btc->btc_write_1byte_bitmask(btc, 0x4c6, BIT(4), 0x1);
btc->btc_write_1byte_bitmask(btc, 0x4c6, BIT(5), 0x0);
/*GNT_BT=1 while select both */
btc->btc_write_1byte_bitmask(btc, 0x763, BIT(4), 0x1);
/* BT_CCA = ~GNT_WL_BB, (not or GNT_BT_BB, LTE_Rx */
btc->btc_write_1byte_bitmask(btc, 0x4fc, 0x3, 0x0);
/* To avoid RF parameter error */
btc->btc_set_rf_reg(btc, BTC_RF_B, 0x1, 0xfffff, 0x40000);
}
void halbtc8822c_cfg_ant_switch(struct btc_coexist *btc)
{}
void halbtc8822c_cfg_gnt_fix(struct btc_coexist *btc)
{
struct btc_coex_sta *coex_sta = &btc->coex_sta;
struct btc_wifi_link_info_ext *link_info_ext = &btc->wifi_link_info_ext;
u32 val = 0x40000;
/* Because WL-S1 5G RF TRX mask affect by GNT_BT
* Set debug mode on: GNT_BT=0, GNT_WL=1, BT at BTG
*/
if (coex_sta->kt_ver == 0 &&
coex_sta->wl_coex_mode == BTC_WLINK_5G)
val = 0x40021;
else if (coex_sta->coex_freerun) /* WL S1 force to GNT_WL=1, GNT_BT=0 */
val = 0x40021;
else
val = 0x40000;
if (btc->board_info.btdm_ant_num == 1) /* BT at S1 for 2-Ant */
val = val | BIT(13);
btc->btc_set_rf_reg(btc, BTC_RF_B, 0x1, 0xfffff, val);
/* Because WL-S0 2G RF TRX can't masked by GNT_BT
* enable "WLS0 BB chage RF mode if GNT_BT = 1" for shared-antenna type
* disable:0x1860[3] = 1, enable:0x1860[3] = 0
*
* enable "AFE DAC off if GNT_WL = 0"
* disable 0x1c30[22] = 0,
* enable: 0x1c30[22] = 1, 0x1c38[12] = 0, 0x1c38[28] = 1
*/
btc->btc_write_1byte_bitmask(btc, 0x1c32, BIT(6), 1);
btc->btc_write_1byte_bitmask(btc, 0x1c39, BIT(4), 0);
btc->btc_write_1byte_bitmask(btc, 0x1c3b, BIT(4), 1);
/* disable WLS1 BB chage RF mode if GNT_BT
* since RF TRx mask can do it
*/
btc->btc_write_1byte_bitmask(btc, 0x4160, BIT(3), 1);
/* for kt_ver >= 3: 0x1860[3] = 0
* always set "WLS0 BB chage RF mode if GNT_WL = 0"
* But the BB DAC will be turned off by GNT_BT = 1
* 0x1ca7[3] = 1, "don't off BB DAC if GNT_BT = 1"
*/
if (coex_sta->wl_coex_mode == BTC_WLINK_5G ||
link_info_ext->is_all_under_5g) {
if (coex_sta->kt_ver >= 3) {
btc->btc_write_1byte_bitmask(btc, 0x1860, BIT(3), 0);
btc->btc_write_1byte_bitmask(btc, 0x1ca7, BIT(3), 1);
} else {
btc->btc_write_1byte_bitmask(btc, 0x1860, BIT(3), 1);
}
} else if (btc->board_info.btdm_ant_num == 2 ||
coex_sta->wl_coex_mode == BTC_WLINK_25GMPORT) {
/* non-shared-antenna or MCC-2band */
if (coex_sta->kt_ver >= 3) {
btc->btc_write_1byte_bitmask(btc, 0x1860, BIT(3), 0);
btc->btc_write_1byte_bitmask(btc, 0x1ca7, BIT(3), 1);
} else {
btc->btc_write_1byte_bitmask(btc, 0x1860, BIT(3), 1);
}
} else { /* shared-antenna */
btc->btc_write_1byte_bitmask(btc, 0x1860, BIT(3), 0);
if (coex_sta->kt_ver >= 3)
btc->btc_write_1byte_bitmask(btc, 0x1ca7, BIT(3), 0);
}
}
void halbtc8822c_cfg_gnt_debug(struct btc_coexist *btc)
{
btc->btc_write_1byte_bitmask(btc, 0x66, BIT(4), 0);
btc->btc_write_1byte_bitmask(btc, 0x67, BIT(0), 0);
btc->btc_write_1byte_bitmask(btc, 0x42, BIT(3), 0);
btc->btc_write_1byte_bitmask(btc, 0x65, BIT(7), 0);
btc->btc_write_1byte_bitmask(btc, 0x73, BIT(3), 0);
}
void halbtc8822c_cfg_rfe_type(struct btc_coexist *btc)
{
struct btc_coex_sta *coex_sta = &btc->coex_sta;
struct btc_rfe_type *rfe_type = &btc->rfe_type;
struct btc_board_info *board_info = &btc->board_info;
rfe_type->rfe_module_type = board_info->rfe_type;
rfe_type->ant_switch_polarity = 0;
rfe_type->ant_switch_exist = FALSE;
rfe_type->ant_switch_with_bt = FALSE;
rfe_type->ant_switch_type = BTC_SWITCH_NONE;
rfe_type->ant_switch_diversity = FALSE;
rfe_type->band_switch_exist = FALSE;
rfe_type->band_switch_type = 0;
rfe_type->band_switch_polarity = 0;
if (btc->board_info.btdm_ant_num == 1)
rfe_type->wlg_at_btg = TRUE;
else
rfe_type->wlg_at_btg = FALSE;
coex_sta->rf4ce_en = FALSE;
/* Disable LTE Coex Function in WiFi side */
btc->btc_write_linderct(btc, 0x38, BIT(7), 0);
/* BTC_CTT_WL_VS_LTE */
btc->btc_write_linderct(btc, 0xa0, 0xffff, 0xffff);
/* BTC_CTT_BT_VS_LTE */
btc->btc_write_linderct(btc, 0xa4, 0xffff, 0xffff);
}
void halbtc8822c_cfg_coexinfo_hw(struct btc_coexist *btc)
{
u8 *cli_buf = btc->cli_buf, u8tmp[4];
u16 u16tmp[4];
u32 u32tmp[4];
boolean lte_coex_on = FALSE;
u32tmp[0] = btc->btc_read_linderct(btc, 0x38);
u32tmp[1] = btc->btc_read_linderct(btc, 0x54);
u8tmp[0] = btc->btc_read_1byte(btc, 0x73);
lte_coex_on = ((u32tmp[0] & BIT(7)) >> 7) ? TRUE : FALSE;
CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s",
"LTE Coex/Path Owner", ((lte_coex_on) ? "On" : "Off"),
((u8tmp[0] & BIT(2)) ? "WL" : "BT"));
CL_PRINTF(cli_buf);
CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
"\r\n %-35s = RF:%s_BB:%s/ RF:%s_BB:%s/ %s",
"GNT_WL_Ctrl/GNT_BT_Ctrl/Dbg",
((u32tmp[0] & BIT(12)) ? "SW" : "HW"),
((u32tmp[0] & BIT(8)) ? "SW" : "HW"),
((u32tmp[0] & BIT(14)) ? "SW" : "HW"),
((u32tmp[0] & BIT(10)) ? "SW" : "HW"),
((u8tmp[0] & BIT(3)) ? "On" : "Off"));
CL_PRINTF(cli_buf);
CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
"GNT_WL/GNT_BT", (int)((u32tmp[1] & BIT(2)) >> 2),
(int)((u32tmp[1] & BIT(3)) >> 3));
CL_PRINTF(cli_buf);
u32tmp[0] = btc->btc_read_4byte(btc, 0x1c38);
u8tmp[0] = btc->btc_read_1byte(btc, 0x1860);
u8tmp[1] = btc->btc_read_1byte(btc, 0x4160);
u8tmp[2] = btc->btc_read_1byte(btc, 0x1c32);
CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
"\r\n %-35s = %d/ %d/ %d/ %d",
"1860[3]/4160[3]/1c30[22]/1c38[28]",
(int)((u8tmp[0] & BIT(3)) >> 3),
(int)((u8tmp[1] & BIT(3)) >> 3),
(int)((u8tmp[2] & BIT(6)) >> 6),
(int)((u32tmp[0] & BIT(28)) >> 28));
CL_PRINTF(cli_buf);
u32tmp[0] = btc->btc_read_4byte(btc, 0x430);
u32tmp[1] = btc->btc_read_4byte(btc, 0x434);
u16tmp[0] = btc->btc_read_2byte(btc, 0x42a);
u8tmp[0] = btc->btc_read_1byte(btc, 0x426);
u8tmp[1] = btc->btc_read_1byte(btc, 0x45e);
u8tmp[2] = btc->btc_read_1byte(btc, 0x455);
CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
"\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x/ 0x%x/ 0x%x",
"430/434/42a/426/45e[3]/455",
u32tmp[0], u32tmp[1], u16tmp[0], u8tmp[0],
(int)((u8tmp[1] & BIT(3)) >> 3), u8tmp[2]);
CL_PRINTF(cli_buf);
u32tmp[0] = btc->btc_read_4byte(btc, 0x4c);
u8tmp[2] = btc->btc_read_1byte(btc, 0x64);
u8tmp[0] = btc->btc_read_1byte(btc, 0x4c6);
u8tmp[1] = btc->btc_read_1byte(btc, 0x40);
CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
"\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x/ 0x%x",
"4c[24:23]/64[0]/4c6[4]/40[5]/RF_0x1",
(int)(u32tmp[0] & (BIT(24) | BIT(23))) >> 23, u8tmp[2] & 0x1,
(int)((u8tmp[0] & BIT(4)) >> 4),
(int)((u8tmp[1] & BIT(5)) >> 5),
(int)(btc->btc_get_rf_reg(btc, BTC_RF_B, 0x1, 0xfffff)));
CL_PRINTF(cli_buf);
u32tmp[0] = btc->btc_read_4byte(btc, 0x550);
u8tmp[0] = btc->btc_read_1byte(btc, 0x522);
u8tmp[1] = btc->btc_read_1byte(btc, 0x953);
u8tmp[2] = btc->btc_read_1byte(btc, 0xc50);
CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
"\r\n %-35s = 0x%x/ 0x%x/ %s/ 0x%x",
"550/522/4-RxAGC/c50", u32tmp[0], u8tmp[0],
(u8tmp[1] & 0x2) ? "On" : "Off", u8tmp[2]);
CL_PRINTF(cli_buf);
u8tmp[0] = btc->btc_read_1byte(btc, 0xf8e);
u8tmp[1] = btc->btc_read_1byte(btc, 0xf8f);
u8tmp[2] = btc->btc_read_1byte(btc, 0xd14);
u8tmp[3] = btc->btc_read_1byte(btc, 0xd54);
CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d",
"EVM_A/ EVM_B/ SNR_A/ SNR_B",
(u8tmp[0] > 127 ? u8tmp[0] - 256 : u8tmp[0]),
(u8tmp[1] > 127 ? u8tmp[1] - 256 : u8tmp[1]),
(u8tmp[2] > 127 ? u8tmp[2] - 256 : u8tmp[2]),
(u8tmp[3] > 127 ? u8tmp[3] - 256 : u8tmp[3]));
CL_PRINTF(cli_buf);
}
void halbtc8822c_cfg_wl_tx_power(struct btc_coexist *btc)
{
struct btc_coex_dm *coex_dm = &btc->coex_dm;
btc->btc_reduce_wl_tx_power(btc, coex_dm->cur_wl_pwr_lvl);
}
void halbtc8822c_cfg_wl_rx_gain(struct btc_coexist *btc)
{
struct btc_coex_dm *coex_dm = &btc->coex_dm;
struct btc_wifi_link_info_ext *link_info_ext = &btc->wifi_link_info_ext;
u8 i;
/* WL Rx Low gain on */
static const u32 wl_rx_gain_on_HT20[] = {0x00000000};
static const u32 wl_rx_gain_on_HT40[] = {0x00000000};
/* WL Rx Low gain off */
static const u32 wl_rx_gain_off_HT20[] = {0x00000000};
static const u32 wl_rx_gain_off_HT40[] = {0x00000000};
u32 *wl_rx_gain_on, *wl_rx_gain_off;
if (coex_dm->cur_wl_rx_low_gain_en) {
BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
"[BTCoex], Hi-Li Table On!\n");
BTC_TRACE(trace_buf);
#if 0
if (link_info_ext->wifi_bw == BTC_WIFI_BW_HT40)
wl_rx_gain_on = wl_rx_gain_on_HT40;
else
wl_rx_gain_on = wl_rx_gain_on_HT20;
for (i = 0; i < ARRAY_SIZE(wl_rx_gain_on); i++)
btc->btc_write_4byte(btc, 0x1d90, wl_rx_gain_on[i]);
#endif
/* set Rx filter corner RCK offset */
btc->btc_set_rf_reg(btc, BTC_RF_A, 0xde, 0xfffff, 0x22);
btc->btc_set_rf_reg(btc, BTC_RF_A, 0x1d, 0xfffff, 0x36);
btc->btc_set_rf_reg(btc, BTC_RF_B, 0xde, 0xfffff, 0x22);
btc->btc_set_rf_reg(btc, BTC_RF_B, 0x1d, 0xfffff, 0x36);
} else {
BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
"[BTCoex], Hi-Li Table Off!\n");
BTC_TRACE(trace_buf);
#if 0
if (link_info_ext->wifi_bw == BTC_WIFI_BW_HT40)
wl_rx_gain_off = wl_rx_gain_off_HT40;
else
wl_rx_gain_off = wl_rx_gain_off_HT20;
for (i = 0; i < ARRAY_SIZE(wl_rx_gain_off); i++)
btc->btc_write_4byte(btc, 0x1d90, wl_rx_gain_off[i]);
#endif
/* set Rx filter corner RCK offset */
btc->btc_set_rf_reg(btc, BTC_RF_A, 0xde, 0xfffff, 0x20);
btc->btc_set_rf_reg(btc, BTC_RF_A, 0x1d, 0xfffff, 0x0);
btc->btc_set_rf_reg(btc, BTC_RF_B, 0xde, 0xfffff, 0x20);
btc->btc_set_rf_reg(btc, BTC_RF_B, 0x1d, 0xfffff, 0x0);
}
}
void halbtc8822c_cfg_wlan_act_ips(struct btc_coexist *btc)
{}
void halbtc8822c_chip_setup(struct btc_coexist *btc, u8 type)
{
switch (type) {
case BTC_CSETUP_INIT_HW:
halbtc8822c_cfg_init(btc);
break;
case BTC_CSETUP_ANT_SWITCH:
halbtc8822c_cfg_ant_switch(btc);
break;
case BTC_CSETUP_GNT_FIX:
halbtc8822c_cfg_gnt_fix(btc);
break;
case BTC_CSETUP_GNT_DEBUG:
halbtc8822c_cfg_gnt_debug(btc);
break;
case BTC_CSETUP_RFE_TYPE:
halbtc8822c_cfg_rfe_type(btc);
break;
case BTC_CSETUP_COEXINFO_HW:
halbtc8822c_cfg_coexinfo_hw(btc);
break;
case BTC_CSETUP_WL_TX_POWER:
halbtc8822c_cfg_wl_tx_power(btc);
break;
case BTC_CSETUP_WL_RX_GAIN:
halbtc8822c_cfg_wl_rx_gain(btc);
break;
case BTC_CSETUP_WLAN_ACT_IPS:
halbtc8822c_cfg_wlan_act_ips(btc);
break;
}
}
#endif

27
hal/btc/halbtc8822c.h Executable file
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@ -0,0 +1,27 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
extern const struct btc_chip_para btc_chip_para_8822c;
void halbtc8822c_chip_setup(struct btc_coexist *btc, u8 type);
void halbtc8822c_cfg_init(struct btc_coexist *btc);
void halbtc8822c_cfg_ant_switch(struct btc_coexist *btc);
void halbtc8822c_cfg_gnt_debug(struct btc_coexist *btc);
void halbtc8822c_cfg_fre_type(struct btc_coexist *btc);
void halbtc8822c_cfg_coexinfo_hw(struct btc_coexist *btc);
void halbtc8822c_cfg_wl_tx_power(struct btc_coexist *btc);
void halbtc8822c_cfg_wl_rx_gain(struct btc_coexist *btc);
void halbtc8822c_cfg_wlan_act_ips(struct btc_coexist *btc);

63
hal/btc/halbtc8822cwifionly.c Executable file
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@ -0,0 +1,63 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#include "mp_precomp.h"
VOID
ex_hal8822c_wifi_only_hw_config(
IN struct wifi_only_cfg *pwifionlycfg
)
{
halwifionly_phy_set_bb_reg(pwifionlycfg, 0x70, 0xff000000, 0x0e);
/*gnt_wl=1 , gnt_bt=0*/
halwifionly_phy_set_bb_reg(pwifionlycfg, 0x1704, 0xffffffff, 0x7700);
halwifionly_phy_set_bb_reg(pwifionlycfg, 0x1700, 0xffffffff, 0xc00f0038);
halwifionly_phy_set_bb_reg(pwifionlycfg, 0x6c0, 0xffffffff, 0xaaaaaaaa);
halwifionly_phy_set_bb_reg(pwifionlycfg, 0x6c4, 0xffffffff, 0xaaaaaaaa);
}
VOID
ex_hal8822c_wifi_only_scannotify(
IN struct wifi_only_cfg *pwifionlycfg,
IN u1Byte is_5g
)
{
}
VOID
ex_hal8822c_wifi_only_switchbandnotify(
IN struct wifi_only_cfg *pwifionlycfg,
IN u1Byte is_5g
)
{
}
VOID
ex_hal8822c_wifi_only_connectnotify(
IN struct wifi_only_cfg *pwifionlycfg,
IN u1Byte is_5g
)
{
}
VOID
hal8822c_wifi_only_switch_antenna(
IN struct wifi_only_cfg *pwifionlycfg,
IN u1Byte is_5g
)
{
}

42
hal/btc/halbtc8822cwifionly.h Executable file
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/******************************************************************************
*
* Copyright(c) 2016 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __INC_HAL8822CWIFIONLYHWCFG_H
#define __INC_HAL8822CWIFIONLYHWCFG_H
VOID
ex_hal8822c_wifi_only_hw_config(
IN struct wifi_only_cfg *pwifionlycfg
);
VOID
ex_hal8822c_wifi_only_scannotify(
IN struct wifi_only_cfg *pwifionlycfg,
IN u1Byte is_5g
);
VOID
ex_hal8822c_wifi_only_switchbandnotify(
IN struct wifi_only_cfg *pwifionlycfg,
IN u1Byte is_5g
);
VOID
ex_hal8822c_wifi_only_connectnotify(
IN struct wifi_only_cfg *pwifionlycfg,
IN u1Byte is_5g
);
VOID
hal8822c_wifi_only_switch_antenna(
IN struct wifi_only_cfg *pwifionlycfg,
IN u1Byte is_5g
);
#endif

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/******************************************************************************
*
* Copyright(c) 2016 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
/* *******************************************
* The following is interface which will notify coex module.
* ********************************************/
void rtw_btc_ex_power_on_setting(struct btc_coexist *btc);
void rtw_btc_ex_pre_load_firmware(struct btc_coexist *btc);
void rtw_btc_ex_init_hw_config(struct btc_coexist *btc, boolean wifi_only);
void rtw_btc_ex_init_coex_dm(struct btc_coexist *btc);
void rtw_btc_ex_ips_notify(struct btc_coexist *btc, u8 type);
void rtw_btc_ex_lps_notify(struct btc_coexist *btc, u8 type);
void rtw_btc_ex_scan_notify(struct btc_coexist *btc, u8 type);
void rtw_btc_ex_scan_notify_without_bt(struct btc_coexist *btc, u8 type);
void rtw_btc_ex_switchband_notify(struct btc_coexist *btc, u8 type);
void rtw_btc_ex_switchband_notify_without_bt(struct btc_coexist *btc, u8 type);
void rtw_btc_ex_connect_notify(struct btc_coexist *btc, u8 type);
void rtw_btc_ex_media_status_notify(struct btc_coexist *btc, u8 type);
void rtw_btc_ex_specific_packet_notify(struct btc_coexist *btc, u8 type);
void rtw_btc_ex_bt_info_notify(struct btc_coexist *btc, u8 *tmp_buf, u8 length);
void rtw_btc_ex_wl_fwdbginfo_notify(struct btc_coexist *btc, u8 *tmp_buf,
u8 length);
void rtw_btc_ex_rx_rate_change_notify(struct btc_coexist *btc,
BOOLEAN is_data_frame,
u8 btc_rate_id);
void rtw_btc_ex_tx_rate_change_notify(struct btc_coexist *btc, u8 tx_rate,
u8 tx_retry_ratio, u8 macid);
void rtw_btc_ex_rf_status_notify(struct btc_coexist *btc, u8 type);
void rtw_btc_ex_halt_notify(struct btc_coexist *btc);
void rtw_btc_ex_pnp_notify(struct btc_coexist *btc, u8 pnp_state);
void rtw_btc_ex_coex_dm_reset(struct btc_coexist *btc);
void rtw_btc_ex_periodical(struct btc_coexist *btc);
void rtw_btc_ex_timerup_notify(struct btc_coexist *btc, u32 type);
void rtw_btc_ex_wl_status_change_notify(struct btc_coexist *btc, u32 type);
void rtw_btc_ex_display_simple_coex_info(struct btc_coexist *btc);
void rtw_btc_ex_display_coex_info(struct btc_coexist *btc);
void rtw_btc_ex_dbg_control(struct btc_coexist *btc, u8 op_code, u8 op_len,
u8 *pdata);
#else
#define rtw_btc_ex_power_on_setting(btc)
#define rtw_btc_ex_pre_load_firmware(btc)
#define rtw_btc_ex_init_hw_config(btc, wifi_only)
#define rtw_btc_ex_init_coex_dm(btc)
#define rtw_btc_ex_ips_notify(btc, type)
#define rtw_btc_ex_lps_notify(btc, type)
#define rtw_btc_ex_scan_notify(btc, type)
#define rtw_btc_ex_scan_notify_without_bt(btc, type)
#define rtw_btc_ex_switchband_notify(btc, type)
#define rtw_btc_ex_switchband_notify_without_bt(btc, type)
#define rtw_btc_ex_connect_notify(btc, type)
#define rtw_btc_ex_media_status_notify(btc, type)
#define rtw_btc_ex_specific_packet_notify(btc, type)
#define rtw_btc_ex_bt_info_notify(btc, tmp_buf, length)
#define rtw_btc_ex_wl_fwdbginfo_notify(btc, tmp_buf, length)
#define rtw_btc_ex_rx_rate_change_notify(btc, is_data_frame, btc_rate_id)
#define rtw_btc_ex_tx_rate_change_notify(btcoexist, tx_rate, tx_retry_ratio, \
macid)
#define rtw_btc_ex_rf_status_notify(btc, type)
#define rtw_btc_ex_halt_notify(btc)
#define rtw_btc_ex_pnp_notify(btc, pnp_state)
#define rtw_btc_ex_coex_dm_reset(btc)
#define rtw_btc_ex_periodical(btc)
#define rtw_btc_ex_timerup_notify(btc, type)
#define rtw_btc_ex_wl_status_change_notify(btc, type)
#define rtw_btc_ex_display_coex_info(btc)
#define rtw_btc_ex_dbg_control(btc, op_code, op_len, pdata)
#endif

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/******************************************************************************
*
* Copyright(c) 2013 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __MP_PRECOMP_H__
#define __MP_PRECOMP_H__
#include <drv_types.h>
#include <hal_data.h>
#include "btc_basic_types.h"
#define BT_TMP_BUF_SIZE 100
#ifdef PLATFORM_LINUX
#define rsprintf snprintf
#define rstrncat(dst, src, src_size) strncat(dst, src, src_size)
#elif defined(PLATFORM_WINDOWS)
#define rsprintf sprintf_s
#endif
#define DCMD_Printf DBG_BT_INFO
#define delay_ms(ms) rtw_mdelay_os(ms)
#ifdef bEnable
#undef bEnable
#endif
#define WPP_SOFTWARE_TRACE 0
typedef enum _BTC_MSG_COMP_TYPE {
COMP_COEX = 0,
COMP_MAX
} BTC_MSG_COMP_TYPE;
extern u4Byte GLBtcDbgType[];
#define DBG_OFF 0
#define DBG_SEC 1
#define DBG_SERIOUS 2
#define DBG_WARNING 3
#define DBG_LOUD 4
#define DBG_TRACE 5
#ifdef CONFIG_BT_COEXIST
#define BT_SUPPORT 1
#define COEX_SUPPORT 1
#define HS_SUPPORT 1
#else
#define BT_SUPPORT 0
#define COEX_SUPPORT 0
#define HS_SUPPORT 0
#endif
/* for wifi only mode */
#include "hal_btcoex_wifionly.h"
#ifdef CONFIG_BT_COEXIST
#define BTC_BTINFO_LENGTH_MAX 10
struct wifi_only_cfg;
struct btc_coexist;
#ifdef CONFIG_RTL8192E
#include "halbtc8192e1ant.h"
#include "halbtc8192e2ant.h"
#endif
#ifdef CONFIG_RTL8723B
#include "halbtc8723bwifionly.h"
#include "halbtc8723b1ant.h"
#include "halbtc8723b2ant.h"
#endif
#ifdef CONFIG_RTL8812A
#include "halbtc8812a1ant.h"
#include "halbtc8812a2ant.h"
#endif
#ifdef CONFIG_RTL8821A
#include "halbtc8821a1ant.h"
#include "halbtc8821a2ant.h"
#endif
#ifdef CONFIG_RTL8703B
#include "halbtc8703b1ant.h"
#endif
#ifdef CONFIG_RTL8723D
#include "halbtc8723d1ant.h"
#include "halbtc8723d2ant.h"
#endif
#ifdef CONFIG_RTL8822B
#include "halbtc8822bwifionly.h"
#include "halbtc8822b1ant.h"
#include "halbtc8822b2ant.h"
#endif
#ifdef CONFIG_RTL8821C
#include "halbtc8821cwifionly.h"
#include "halbtc8821c1ant.h"
#include "halbtc8821c2ant.h"
#endif
#ifdef CONFIG_RTL8822C
#include "halbtccommon.h"
#include "halbtc8822cwifionly.h"
#include "halbtc8822c.h"
#endif
#ifdef CONFIG_RTL8814A
#include "halbtc8814a2ant.h"
#endif
#include "halbtcoutsrc.h"
#else /* CONFIG_BT_COEXIST */
#ifdef CONFIG_RTL8723B
#include "halbtc8723bwifionly.h"
#endif
#ifdef CONFIG_RTL8822B
#include "halbtc8822bwifionly.h"
#endif
#ifdef CONFIG_RTL8821C
#include "halbtc8821cwifionly.h"
#endif
#ifdef CONFIG_RTL8822C
#include "halbtc8822cwifionly.h"
#endif
#endif /* CONFIG_BT_COEXIST */
#endif /* __MP_PRECOMP_H__ */

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/******************************************************************************
*
* Copyright(c) 2016 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifdef CONFIG_USB_HCI
#if defined(CONFIG_RTL8188E)
#include "rtl8188e/HalEfuseMask8188E_USB.h"
#endif
#if defined(CONFIG_RTL8812A)
#include "rtl8812a/HalEfuseMask8812A_USB.h"
#endif
#if defined(CONFIG_RTL8821A)
#include "rtl8812a/HalEfuseMask8821A_USB.h"
#endif
#if defined(CONFIG_RTL8192E)
#include "rtl8192e/HalEfuseMask8192E_USB.h"
#endif
#if defined(CONFIG_RTL8723B)
#include "rtl8723b/HalEfuseMask8723B_USB.h"
#endif
#if defined(CONFIG_RTL8814A)
#include "rtl8814a/HalEfuseMask8814A_USB.h"
#endif
#if defined(CONFIG_RTL8703B)
#include "rtl8703b/HalEfuseMask8703B_USB.h"
#endif
#if defined(CONFIG_RTL8723D)
#include "rtl8723d/HalEfuseMask8723D_USB.h"
#endif
#if defined(CONFIG_RTL8188F)
#include "rtl8188f/HalEfuseMask8188F_USB.h"
#endif
#if defined(CONFIG_RTL8188GTV)
#include "rtl8188gtv/HalEfuseMask8188GTV_USB.h"
#endif
#if defined(CONFIG_RTL8822B)
#include "rtl8822b/HalEfuseMask8822B_USB.h"
#endif
#if defined(CONFIG_RTL8821C)
#include "rtl8821c/HalEfuseMask8821C_USB.h"
#endif
#if defined(CONFIG_RTL8710B)
#include "rtl8710b/HalEfuseMask8710B_USB.h"
#endif
#if defined(CONFIG_RTL8192F)
#include "rtl8192f/HalEfuseMask8192F_USB.h"
#endif
#if defined(CONFIG_RTL8822C)
#include "rtl8822c/HalEfuseMask8822C_USB.h"
#endif
#endif /*CONFIG_USB_HCI*/
#ifdef CONFIG_PCI_HCI
#if defined(CONFIG_RTL8188E)
#include "rtl8188e/HalEfuseMask8188E_PCIE.h"
#endif
#if defined(CONFIG_RTL8812A)
#include "rtl8812a/HalEfuseMask8812A_PCIE.h"
#endif
#if defined(CONFIG_RTL8821A)
#include "rtl8812a/HalEfuseMask8821A_PCIE.h"
#endif
#if defined(CONFIG_RTL8192E)
#include "rtl8192e/HalEfuseMask8192E_PCIE.h"
#endif
#if defined(CONFIG_RTL8723B)
#include "rtl8723b/HalEfuseMask8723B_PCIE.h"
#endif
#if defined(CONFIG_RTL8814A)
#include "rtl8814a/HalEfuseMask8814A_PCIE.h"
#endif
#if defined(CONFIG_RTL8703B)
#include "rtl8703b/HalEfuseMask8703B_PCIE.h"
#endif
#if defined(CONFIG_RTL8822B)
#include "rtl8822b/HalEfuseMask8822B_PCIE.h"
#endif
#if defined(CONFIG_RTL8723D)
#include "rtl8723d/HalEfuseMask8723D_PCIE.h"
#endif
#if defined(CONFIG_RTL8821C)
#include "rtl8821c/HalEfuseMask8821C_PCIE.h"
#endif
#if defined(CONFIG_RTL8192F)
#include "rtl8192f/HalEfuseMask8192F_PCIE.h"
#endif
#if defined(CONFIG_RTL8822C)
#include "rtl8822c/HalEfuseMask8822C_PCIE.h"
#endif
#endif /*CONFIG_PCI_HCI*/
#ifdef CONFIG_SDIO_HCI
#if defined(CONFIG_RTL8723B)
#include "rtl8723b/HalEfuseMask8723B_SDIO.h"
#endif
#if defined(CONFIG_RTL8188E)
#include "rtl8188e/HalEfuseMask8188E_SDIO.h"
#endif
#if defined(CONFIG_RTL8703B)
#include "rtl8703b/HalEfuseMask8703B_SDIO.h"
#endif
#if defined(CONFIG_RTL8188F)
#include "rtl8188f/HalEfuseMask8188F_SDIO.h"
#endif
#if defined(CONFIG_RTL8188GTV)
#include "rtl8188gtv/HalEfuseMask8188GTV_SDIO.h"
#endif
#if defined(CONFIG_RTL8723D)
#include "rtl8723d/HalEfuseMask8723D_SDIO.h"
#endif
#if defined(CONFIG_RTL8192E)
#include "rtl8192e/HalEfuseMask8192E_SDIO.h"
#endif
#if defined(CONFIG_RTL8821A)
#include "rtl8812a/HalEfuseMask8821A_SDIO.h"
#endif
#if defined(CONFIG_RTL8821C)
#include "rtl8821c/HalEfuseMask8821C_SDIO.h"
#endif
#if defined(CONFIG_RTL8822B)
#include "rtl8822b/HalEfuseMask8822B_SDIO.h"
#endif
#if defined(CONFIG_RTL8192F)
#include "rtl8192f/HalEfuseMask8192F_SDIO.h"
#endif
#if defined(CONFIG_RTL8822C)
#include "rtl8822c/HalEfuseMask8822C_SDIO.h"
#endif
#endif /*CONFIG_SDIO_HCI*/

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hal/efuse/rtl8822c/HalEfuseMask8822C_PCIE.c Executable file
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/******************************************************************************
*
* Copyright(c) 2015 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#include <drv_types.h>
#include "HalEfuseMask8822C_PCIE.h"
/******************************************************************************
* MPCIE.TXT
******************************************************************************/
u8 Array_MP_8822C_MPCIE_BT[] = {
0x00,
0x41,
0x00,
0x70,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x02,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x08,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0xCF,
0xFF,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
};
u8 Array_MP_8822C_MPCIE[] = {
0xFF,
0xF7,
0xEF,
0xDE,
0xFC,
0xFB,
0x10,
0x00,
0x00,
0x00,
0x00,
0x03,
0xF7,
0xD7,
0x00,
0x00,
0x71,
0xF1,
0xFF,
0xFF,
0x7E,
0xFC,
0xFF,
0xF1,
0x00,
0xD0,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
};
/* BT eFuse Maks */
u16 EFUSE_GetBTArrayLen_MP_8822C_MPCIE(void)
{
return sizeof(Array_MP_8822C_MPCIE_BT) / sizeof(u8);
}
void EFUSE_GetBTMaskArray_MP_8822C_MPCIE(u8 *Array)
{
u16 len = EFUSE_GetBTArrayLen_MP_8822C_MPCIE(), i = 0;
for (i = 0; i < len; ++i)
Array[i] = Array_MP_8822C_MPCIE_BT[i];
}
BOOLEAN EFUSE_IsBTAddressMasked_MP_8822C_MPCIE(u16 Offset)
{
int r = Offset / 16;
int c = (Offset % 16) / 2;
int result = 0;
if (c < 4) /*Upper double word*/
result = (Array_MP_8822C_MPCIE_BT[r] & (0x10 << c));
else
result = (Array_MP_8822C_MPCIE_BT[r] & (0x01 << (c - 4)));
return (result > 0) ? 0 : 1;
}
/* WiFi eFuse Maks */
u16 EFUSE_GetArrayLen_MP_8822C_MPCIE(void)
{
return sizeof(Array_MP_8822C_MPCIE) / sizeof(u8);
}
void EFUSE_GetMaskArray_MP_8822C_MPCIE(u8 *Array)
{
u16 len = EFUSE_GetArrayLen_MP_8822C_MPCIE(), i = 0;
for (i = 0; i < len; ++i)
Array[i] = Array_MP_8822C_MPCIE[i];
}
BOOLEAN EFUSE_IsAddressMasked_MP_8822C_MPCIE(u16 Offset)
{
int r = Offset / 16;
int c = (Offset % 16) / 2;
int result = 0;
if (c < 4) /*Upper double word*/
result = (Array_MP_8822C_MPCIE[r] & (0x10 << c));
else
result = (Array_MP_8822C_MPCIE[r] & (0x01 << (c - 4)));
return (result > 0) ? 0 : 1;
}

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hal/efuse/rtl8822c/HalEfuseMask8822C_PCIE.h Executable file
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/******************************************************************************
*
* Copyright(c) 2015 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
/******************************************************************************
* MPCIE.TXT
******************************************************************************/
u16 EFUSE_GetArrayLen_MP_8822C_MPCIE(void);
void EFUSE_GetMaskArray_MP_8822C_MPCIE(u8 *Array);
BOOLEAN EFUSE_IsAddressMasked_MP_8822C_MPCIE(u16 Offset);
u16 EFUSE_GetBTArrayLen_MP_8822C_MPCIE(void);
void EFUSE_GetBTMaskArray_MP_8822C_MPCIE(u8 *Array);
BOOLEAN EFUSE_IsBTAddressMasked_MP_8822C_MPCIE(u16 Offset);

194
hal/efuse/rtl8822c/HalEfuseMask8822C_SDIO.c Executable file
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/******************************************************************************
*
* Copyright(c) 2015 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#include <drv_types.h>
#include "HalEfuseMask8822C_SDIO.h"
/******************************************************************************
* MSDIO.TXT
******************************************************************************/
u8 Array_MP_8822C_MSDIO_BT[] = {
0x00,
0x41,
0x00,
0x70,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x02,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x08,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0xCF,
0xFF,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
};
u8 Array_MP_8822C_MSDIO[] = {
0xFF,
0xF7,
0xEF,
0xDE,
0xFC,
0xFB,
0x10,
0x00,
0x00,
0x00,
0x00,
0x03,
0xF7,
0xD7,
0x00,
0x00,
0x71,
0xF1,
0x76,
0x00,
0x00,
0x00,
0x0E,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
};
/* BT eFuse Mask */
u16 EFUSE_GetBTArrayLen_MP_8822C_MSDIO(void)
{
return sizeof(Array_MP_8822C_MSDIO_BT) / sizeof(u8);
}
void EFUSE_GetBTMaskArray_MP_8822C_MSDIO(u8 *Array)
{
u16 len = EFUSE_GetBTArrayLen_MP_8822C_MSDIO(), i = 0;
for (i = 0; i < len; ++i)
Array[i] = Array_MP_8822C_MSDIO_BT[i];
}
BOOLEAN EFUSE_IsBTAddressMasked_MP_8822C_MSDIO(u16 Offset)
{
int r = Offset / 16;
int c = (Offset % 16) / 2;
int result = 0;
if (c < 4) /*Upper double word*/
result = (Array_MP_8822C_MSDIO_BT[r] & (0x10 << c));
else
result = (Array_MP_8822C_MSDIO_BT[r] & (0x01 << (c - 4)));
return (result > 0) ? 0 : 1;
}
/* WiFi eFuse Mask */
u16 EFUSE_GetArrayLen_MP_8822C_MSDIO(void)
{
return sizeof(Array_MP_8822C_MSDIO) / sizeof(u8);
}
void EFUSE_GetMaskArray_MP_8822C_MSDIO(u8 *Array)
{
u16 len = EFUSE_GetArrayLen_MP_8822C_MSDIO(), i = 0;
for (i = 0; i < len; ++i)
Array[i] = Array_MP_8822C_MSDIO[i];
}
BOOLEAN EFUSE_IsAddressMasked_MP_8822C_MSDIO(u16 Offset)
{
int r = Offset / 16;
int c = (Offset % 16) / 2;
int result = 0;
if (c < 4) /*Upper double word*/
result = (Array_MP_8822C_MSDIO[r] & (0x10 << c));
else
result = (Array_MP_8822C_MSDIO[r] & (0x01 << (c - 4)));
return (result > 0) ? 0 : 1;
}

34
hal/efuse/rtl8822c/HalEfuseMask8822C_SDIO.h Executable file
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/******************************************************************************
*
* Copyright(c) 2015 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
/******************************************************************************
* MSDIO.TXT
******************************************************************************/
u16 EFUSE_GetArrayLen_MP_8822C_MSDIO(void);
void EFUSE_GetMaskArray_MP_8822C_MSDIO(u8 *Array);
BOOLEAN EFUSE_IsAddressMasked_MP_8822C_MSDIO(u16 Offset);
u16 EFUSE_GetBTArrayLen_MP_8822C_MSDIO(void);
void EFUSE_GetBTMaskArray_MP_8822C_MSDIO(u8 *Array);
BOOLEAN EFUSE_IsBTAddressMasked_MP_8822C_MSDIO(u16 Offset);

197
hal/efuse/rtl8822c/HalEfuseMask8822C_USB.c Executable file
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/******************************************************************************
*
* Copyright(c) 2015 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#include <drv_types.h>
#include "HalEfuseMask8822C_USB.h"
/******************************************************************************
* MUSB.TXT
******************************************************************************/
u8 Array_MP_8822C_MUSB_BT[] = {
0x00,
0x41,
0x00,
0x70,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x02,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x08,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0xCF,
0xFF,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
};
u8 Array_MP_8822C_MUSB[] = {
0xFF,
0xF7,
0xEF,
0xDE,
0xFC,
0xFB,
0x10,
0x00,
0x00,
0x00,
0x00,
0x03,
0xF7,
0xD7,
0x00,
0x00,
0x71,
0xF1,
0x00,
0x00,
0x00,
0xFF,
0xFF,
0xFF,
0xFF,
0xD0,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
};
/* BT eFuse Mask */
u16 EFUSE_GetBTArrayLen_MP_8822C_MUSB(void)
{
return sizeof(Array_MP_8822C_MUSB_BT) / sizeof(u8);
}
void EFUSE_GetBTMaskArray_MP_8822C_MUSB(u8 *Array)
{
u16 len = EFUSE_GetBTArrayLen_MP_8822C_MUSB(), i = 0;
for (i = 0; i < len; ++i)
Array[i] = Array_MP_8822C_MUSB_BT[i];
}
BOOLEAN EFUSE_IsBTAddressMasked_MP_8822C_MUSB(u16 Offset)
{
int r = Offset / 16;
int c = (Offset % 16) / 2;
int result = 0;
if (c < 4) /*Upper double word*/
result = (Array_MP_8822C_MUSB_BT[r] & (0x10 << c));
else
result = (Array_MP_8822C_MUSB_BT[r] & (0x01 << (c - 4)));
return (result > 0) ? 0 : 1;
}
/* WiFi eFuse Mask */
u16 EFUSE_GetArrayLen_MP_8822C_MUSB(void)
{
return sizeof(Array_MP_8822C_MUSB) / sizeof(u8);
}
void EFUSE_GetMaskArray_MP_8822C_MUSB(u8 *Array)
{
u16 len = EFUSE_GetArrayLen_MP_8822C_MUSB(), i = 0;
for (i = 0; i < len; ++i)
Array[i] = Array_MP_8822C_MUSB[i];
}
BOOLEAN EFUSE_IsAddressMasked_MP_8822C_MUSB(u16 Offset)
{
int r = Offset / 16;
int c = (Offset % 16) / 2;
int result = 0;
if (c < 4) /*Upper double word*/
result = (Array_MP_8822C_MUSB[r] & (0x10 << c));
else
result = (Array_MP_8822C_MUSB[r] & (0x01 << (c - 4)));
return (result > 0) ? 0 : 1;
}

34
hal/efuse/rtl8822c/HalEfuseMask8822C_USB.h Executable file
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/******************************************************************************
*
* Copyright(c) 2015 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
/******************************************************************************
* MUSB.TXT
******************************************************************************/
u16 EFUSE_GetArrayLen_MP_8822C_MUSB(void);
void EFUSE_GetMaskArray_MP_8822C_MUSB(u8 *Array);
BOOLEAN EFUSE_IsAddressMasked_MP_8822C_MUSB(u16 Offset);
u16 EFUSE_GetBTArrayLen_MP_8822C_MUSB(void);
void EFUSE_GetBTMaskArray_MP_8822C_MUSB(u8 *Array);
BOOLEAN EFUSE_IsBTAddressMasked_MP_8822C_MUSB(u16 Offset);

6333
hal/hal_btcoex.c Normal file
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245
hal/hal_btcoex_wifionly.c Normal file
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/******************************************************************************
*
* Copyright(c) 2016 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#include <hal_btcoex_wifionly.h>
#if (CONFIG_BTCOEX_SUPPORT_WIFI_ONLY_CFG == 1)
#include "btc/mp_precomp.h"
struct wifi_only_cfg GLBtCoexistWifiOnly;
void halwifionly_write1byte(void *pwifionlyContext, u32 RegAddr, u8 Data)
{
struct wifi_only_cfg *pwifionlycfg = (struct wifi_only_cfg *)pwifionlyContext;
PADAPTER Adapter = pwifionlycfg->Adapter;
rtw_write8(Adapter, RegAddr, Data);
}
void halwifionly_write2byte(void *pwifionlyContext, u32 RegAddr, u16 Data)
{
struct wifi_only_cfg *pwifionlycfg = (struct wifi_only_cfg *)pwifionlyContext;
PADAPTER Adapter = pwifionlycfg->Adapter;
rtw_write16(Adapter, RegAddr, Data);
}
void halwifionly_write4byte(void *pwifionlyContext, u32 RegAddr, u32 Data)
{
struct wifi_only_cfg *pwifionlycfg = (struct wifi_only_cfg *)pwifionlyContext;
PADAPTER Adapter = pwifionlycfg->Adapter;
rtw_write32(Adapter, RegAddr, Data);
}
u8 halwifionly_read1byte(void *pwifionlyContext, u32 RegAddr)
{
struct wifi_only_cfg *pwifionlycfg = (struct wifi_only_cfg *)pwifionlyContext;
PADAPTER Adapter = pwifionlycfg->Adapter;
return rtw_read8(Adapter, RegAddr);
}
u16 halwifionly_read2byte(void * pwifionlyContext, u32 RegAddr)
{
struct wifi_only_cfg *pwifionlycfg = (struct wifi_only_cfg *)pwifionlyContext;
PADAPTER Adapter = pwifionlycfg->Adapter;
return rtw_read16(Adapter, RegAddr);
}
u32 halwifionly_read4byte(void *pwifionlyContext, u32 RegAddr)
{
struct wifi_only_cfg *pwifionlycfg = (struct wifi_only_cfg *)pwifionlyContext;
PADAPTER Adapter = pwifionlycfg->Adapter;
return rtw_read32(Adapter, RegAddr);
}
void halwifionly_bitmaskwrite1byte(void *pwifionlyContext, u32 regAddr, u8 bitMask, u8 data)
{
u8 originalValue, bitShift = 0;
u8 i;
struct wifi_only_cfg *pwifionlycfg = (struct wifi_only_cfg *)pwifionlyContext;
PADAPTER Adapter = pwifionlycfg->Adapter;
if (bitMask != 0xff) {
originalValue = rtw_read8(Adapter, regAddr);
for (i = 0; i <= 7; i++) {
if ((bitMask >> i) & 0x1)
break;
}
bitShift = i;
data = ((originalValue) & (~bitMask)) | (((data << bitShift)) & bitMask);
}
rtw_write8(Adapter, regAddr, data);
}
void halwifionly_phy_set_rf_reg(void *pwifionlyContext, enum rf_path eRFPath, u32 RegAddr, u32 BitMask, u32 Data)
{
struct wifi_only_cfg *pwifionlycfg = (struct wifi_only_cfg *)pwifionlyContext;
PADAPTER Adapter = pwifionlycfg->Adapter;
phy_set_rf_reg(Adapter, eRFPath, RegAddr, BitMask, Data);
}
void halwifionly_phy_set_bb_reg(void *pwifionlyContext, u32 RegAddr, u32 BitMask, u32 Data)
{
struct wifi_only_cfg *pwifionlycfg = (struct wifi_only_cfg *)pwifionlyContext;
PADAPTER Adapter = pwifionlycfg->Adapter;
phy_set_bb_reg(Adapter, RegAddr, BitMask, Data);
}
void hal_btcoex_wifionly_switchband_notify(PADAPTER padapter)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
u8 is_5g = _FALSE;
if (pHalData->current_band_type == BAND_ON_5G)
is_5g = _TRUE;
if (IS_HARDWARE_TYPE_8822B(padapter)) {
#ifdef CONFIG_RTL8822B
ex_hal8822b_wifi_only_switchbandnotify(&GLBtCoexistWifiOnly, is_5g);
#endif
}
#ifdef CONFIG_RTL8821C
else if (IS_HARDWARE_TYPE_8821C(padapter))
ex_hal8821c_wifi_only_switchbandnotify(&GLBtCoexistWifiOnly, is_5g);
#endif
#ifdef CONFIG_RTL8822C
else if (IS_HARDWARE_TYPE_8822C(padapter))
ex_hal8822c_wifi_only_switchbandnotify(&GLBtCoexistWifiOnly, is_5g);
#endif
}
void hal_btcoex_wifionly_scan_notify(PADAPTER padapter)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
u8 is_5g = _FALSE;
if (pHalData->current_band_type == BAND_ON_5G)
is_5g = _TRUE;
if (IS_HARDWARE_TYPE_8822B(padapter)) {
#ifdef CONFIG_RTL8822B
ex_hal8822b_wifi_only_scannotify(&GLBtCoexistWifiOnly, is_5g);
#endif
}
#ifdef CONFIG_RTL8821C
else if (IS_HARDWARE_TYPE_8821C(padapter))
ex_hal8821c_wifi_only_scannotify(&GLBtCoexistWifiOnly, is_5g);
#endif
#ifdef CONFIG_RTL8822C
else if (IS_HARDWARE_TYPE_8822C(padapter))
ex_hal8822c_wifi_only_scannotify(&GLBtCoexistWifiOnly, is_5g);
#endif
}
void hal_btcoex_wifionly_connect_notify(PADAPTER padapter)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
u8 is_5g = _FALSE;
if (pHalData->current_band_type == BAND_ON_5G)
is_5g = _TRUE;
if (IS_HARDWARE_TYPE_8822B(padapter)) {
#ifdef CONFIG_RTL8822B
ex_hal8822b_wifi_only_connectnotify(&GLBtCoexistWifiOnly, is_5g);
#endif
}
#ifdef CONFIG_RTL8821C
else if (IS_HARDWARE_TYPE_8821C(padapter))
ex_hal8821c_wifi_only_connectnotify(&GLBtCoexistWifiOnly, is_5g);
#endif
#ifdef CONFIG_RTL8822C
else if (IS_HARDWARE_TYPE_8822C(padapter))
ex_hal8822c_wifi_only_connectnotify(&GLBtCoexistWifiOnly, is_5g);
#endif
}
void hal_btcoex_wifionly_hw_config(PADAPTER padapter)
{
struct wifi_only_cfg *pwifionlycfg = &GLBtCoexistWifiOnly;
if (IS_HARDWARE_TYPE_8723B(padapter)) {
#ifdef CONFIG_RTL8723B
ex_hal8723b_wifi_only_hw_config(pwifionlycfg);
#endif
}
#ifdef CONFIG_RTL8822B
else if (IS_HARDWARE_TYPE_8822B(padapter))
ex_hal8822b_wifi_only_hw_config(pwifionlycfg);
#endif
#ifdef CONFIG_RTL8821C
else if (IS_HARDWARE_TYPE_8821C(padapter))
ex_hal8821c_wifi_only_hw_config(pwifionlycfg);
#endif
#ifdef CONFIG_RTL8822C
else if (IS_HARDWARE_TYPE_8822C(padapter))
ex_hal8822c_wifi_only_hw_config(pwifionlycfg);
#endif
}
void hal_btcoex_wifionly_initlizevariables(PADAPTER padapter)
{
struct wifi_only_cfg *pwifionlycfg = &GLBtCoexistWifiOnly;
struct wifi_only_haldata *pwifionly_haldata = &pwifionlycfg->haldata_info;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
_rtw_memset(&GLBtCoexistWifiOnly, 0, sizeof(GLBtCoexistWifiOnly));
pwifionlycfg->Adapter = padapter;
#ifdef CONFIG_PCI_HCI
pwifionlycfg->chip_interface = WIFIONLY_INTF_PCI;
#elif defined(CONFIG_USB_HCI)
pwifionlycfg->chip_interface = WIFIONLY_INTF_USB;
#elif defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
pwifionlycfg->chip_interface = WIFIONLY_INTF_SDIO;
#else
pwifionlycfg->chip_interface = WIFIONLY_INTF_UNKNOWN;
#endif
pwifionly_haldata->customer_id = CUSTOMER_NORMAL;
}
void hal_btcoex_wifionly_AntInfoSetting(PADAPTER padapter)
{
struct wifi_only_cfg *pwifionlycfg = &GLBtCoexistWifiOnly;
struct wifi_only_haldata *pwifionly_haldata = &pwifionlycfg->haldata_info;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
pwifionly_haldata->efuse_pg_antnum = pHalData->EEPROMBluetoothAntNum;
pwifionly_haldata->efuse_pg_antpath = pHalData->ant_path;
pwifionly_haldata->rfe_type = pHalData->rfe_type;
pwifionly_haldata->ant_div_cfg = pHalData->AntDivCfg;
}
#endif

15288
hal/hal_com.c Normal file
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126
hal/hal_com_c2h.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __COMMON_C2H_H__
#define __COMMON_C2H_H__
#define C2H_TYPE_REG 0
#define C2H_TYPE_PKT 1
/*
* C2H event format:
* Fields TRIGGER PAYLOAD SEQ PLEN ID
* BITS [127:120] [119:16] [15:8] [7:4] [3:0]
*/
#define C2H_ID(_c2h) LE_BITS_TO_1BYTE(((u8*)(_c2h)), 0, 4)
#define C2H_PLEN(_c2h) LE_BITS_TO_1BYTE(((u8*)(_c2h)), 4, 4)
#define C2H_SEQ(_c2h) LE_BITS_TO_1BYTE(((u8*)(_c2h)) + 1, 0, 8)
#define C2H_PAYLOAD(_c2h) (((u8*)(_c2h)) + 2)
#define SET_C2H_ID(_c2h, _val) SET_BITS_TO_LE_1BYTE(((u8*)(_c2h)), 0, 4, _val)
#define SET_C2H_PLEN(_c2h, _val) SET_BITS_TO_LE_1BYTE(((u8*)(_c2h)), 4, 4, _val)
#define SET_C2H_SEQ(_c2h, _val) SET_BITS_TO_LE_1BYTE(((u8*)(_c2h)) + 1 , 0, 8, _val)
/*
* C2H event format:
* Fields TRIGGER PLEN PAYLOAD SEQ ID
* BITS [127:120] [119:112] [111:16] [15:8] [7:0]
*/
#define C2H_ID_88XX(_c2h) LE_BITS_TO_1BYTE(((u8*)(_c2h)), 0, 8)
#define C2H_SEQ_88XX(_c2h) LE_BITS_TO_1BYTE(((u8*)(_c2h)) + 1, 0, 8)
#define C2H_PAYLOAD_88XX(_c2h) (((u8*)(_c2h)) + 2)
#define C2H_PLEN_88XX(_c2h) LE_BITS_TO_1BYTE(((u8*)(_c2h)) + 14, 0, 8)
#define C2H_TRIGGER_88XX(_c2h) LE_BITS_TO_1BYTE(((u8*)(_c2h)) + 15, 0, 8)
#define SET_C2H_ID_88XX(_c2h, _val) SET_BITS_TO_LE_1BYTE(((u8*)(_c2h)), 0, 8, _val)
#define SET_C2H_SEQ_88XX(_c2h, _val) SET_BITS_TO_LE_1BYTE(((u8*)(_c2h)) + 1, 0, 8, _val)
#define SET_C2H_PLEN_88XX(_c2h, _val) SET_BITS_TO_LE_1BYTE(((u8*)(_c2h)) + 14, 0, 8, _val)
typedef enum _C2H_EVT {
C2H_DBG = 0x00,
C2H_LB = 0x01,
C2H_TXBF = 0x02,
C2H_CCX_TX_RPT = 0x03,
C2H_AP_REQ_TXRPT = 0x04,
C2H_FW_SCAN_COMPLETE = 0x7,
C2H_BT_INFO = 0x09,
C2H_BT_MP_INFO = 0x0B,
C2H_RA_RPT = 0x0C,
C2H_SPC_STAT = 0x0D,
C2H_RA_PARA_RPT = 0x0E,
C2H_FW_CHNL_SWITCH_COMPLETE = 0x10,
C2H_IQK_FINISH = 0x11,
C2H_MAILBOX_STATUS = 0x15,
C2H_P2P_RPORT = 0x16,
C2H_MCC = 0x17,
C2H_MAC_HIDDEN_RPT = 0x19,
C2H_MAC_HIDDEN_RPT_2 = 0x1A,
C2H_BCN_EARLY_RPT = 0x1E,
C2H_DEFEATURE_DBG = 0x22,
C2H_CUSTOMER_STR_RPT = 0x24,
C2H_CUSTOMER_STR_RPT_2 = 0x25,
C2H_WLAN_INFO = 0x27,
#ifdef RTW_PER_CMD_SUPPORT_FW
C2H_PER_RATE_RPT = 0x2c,
#endif
C2H_LPS_STATUS_RPT = 0x32,
C2H_DEFEATURE_RSVD = 0xFD,
C2H_EXTEND = 0xff,
} C2H_EVT;
typedef enum _EXTEND_C2H_EVT {
EXTEND_C2H_DBG_PRINT = 0
} EXTEND_C2H_EVT;
#define C2H_REG_LEN 16
/* C2H_IQK_FINISH, 0x11 */
#define IQK_OFFLOAD_LEN 1
void c2h_iqk_offload(_adapter *adapter, u8 *data, u8 len);
int c2h_iqk_offload_wait(_adapter *adapter, u32 timeout_ms);
#define rtl8812_iqk_wait c2h_iqk_offload_wait /* TODO: remove this after phydm call c2h_iqk_offload_wait instead */
#ifdef CONFIG_RTW_MAC_HIDDEN_RPT
/* C2H_MAC_HIDDEN_RPT, 0x19 */
#define MAC_HIDDEN_RPT_LEN 8
int c2h_mac_hidden_rpt_hdl(_adapter *adapter, u8 *data, u8 len);
/* C2H_MAC_HIDDEN_RPT_2, 0x1A */
#define MAC_HIDDEN_RPT_2_LEN 5
int c2h_mac_hidden_rpt_2_hdl(_adapter *adapter, u8 *data, u8 len);
int hal_read_mac_hidden_rpt(_adapter *adapter);
#else
#define hal_read_mac_hidden_rpt(adapter) _SUCCESS
#endif /* CONFIG_RTW_MAC_HIDDEN_RPT */
/* C2H_DEFEATURE_DBG, 0x22 */
#define DEFEATURE_DBG_LEN 1
int c2h_defeature_dbg_hdl(_adapter *adapter, u8 *data, u8 len);
#ifdef CONFIG_RTW_CUSTOMER_STR
/* C2H_CUSTOMER_STR_RPT, 0x24 */
#define CUSTOMER_STR_RPT_LEN 8
int c2h_customer_str_rpt_hdl(_adapter *adapter, u8 *data, u8 len);
/* C2H_CUSTOMER_STR_RPT_2, 0x25 */
#define CUSTOMER_STR_RPT_2_LEN 8
int c2h_customer_str_rpt_2_hdl(_adapter *adapter, u8 *data, u8 len);
#endif /* CONFIG_RTW_CUSTOMER_STR */
#ifdef RTW_PER_CMD_SUPPORT_FW
/* C2H_PER_RATE_RPT, 0x2c */
int c2h_per_rate_rpt_hdl(_adapter *adapter, u8 *data, u8 len);
#endif
#endif /* __COMMON_C2H_H__ */

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hal/hal_dm.c Executable file
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hal/hal_dm.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __HAL_DM_H__
#define __HAL_DM_H__
#define adapter_to_phydm(adapter) (&(GET_HAL_DATA(adapter)->odmpriv))
#define dvobj_to_phydm(dvobj) adapter_to_phydm(dvobj_get_primary_adapter(dvobj))
#ifdef CONFIG_TDMADIG
void rtw_phydm_tdmadig(_adapter *adapter, u8 state);
#endif
void rtw_phydm_priv_init(_adapter *adapter);
void Init_ODM_ComInfo(_adapter *adapter);
void rtw_phydm_init(_adapter *adapter);
void rtw_hal_turbo_edca(_adapter *adapter);
u8 rtw_phydm_is_iqk_in_progress(_adapter *adapter);
void GetHalODMVar(
PADAPTER Adapter,
HAL_ODM_VARIABLE eVariable,
void *pValue1,
void *pValue2);
void SetHalODMVar(
PADAPTER Adapter,
HAL_ODM_VARIABLE eVariable,
void *pValue1,
BOOLEAN bSet);
void rtw_phydm_ra_registed(_adapter *adapter, struct sta_info *psta);
#ifdef CONFIG_DYNAMIC_SOML
void rtw_dyn_soml_byte_update(_adapter *adapter, u8 data_rate, u32 size);
void rtw_dyn_soml_para_set(_adapter *adapter, u8 train_num, u8 intvl,
u8 period, u8 delay);
void rtw_dyn_soml_config(_adapter *adapter);
#endif
#ifdef RTW_DYNAMIC_RRSR
void rtw_phydm_set_rrsr(_adapter *adapter, u32 rrsr_value, bool write_rrsr);
#endif
void rtw_phydm_watchdog(_adapter *adapter, bool in_lps);
void rtw_hal_update_iqk_fw_offload_cap(_adapter *adapter);
void dump_sta_info(void *sel, struct sta_info *psta);
void dump_sta_traffic(void *sel, _adapter *adapter, struct sta_info *psta);
#ifdef CONFIG_DBG_RF_CAL
void rtw_hal_iqk_test(_adapter *adapter, bool recovery, bool clear, bool segment);
void rtw_hal_lck_test(_adapter *adapter);
#endif
s8 rtw_dm_get_min_rssi(_adapter *adapter);
s8 rtw_phydm_get_min_rssi(_adapter *adapter);
u8 rtw_phydm_get_cur_igi(_adapter *adapter);
bool rtw_phydm_get_edcca_flag(_adapter *adapter);
#ifdef CONFIG_LPS_LCLK_WD_TIMER
extern void phydm_rssi_monitor_check(void *p_dm_void);
void rtw_phydm_wd_lps_lclk_hdl(_adapter *adapter);
void rtw_phydm_watchdog_in_lps_lclk(_adapter *adapter);
#endif
#ifdef CONFIG_TDMADIG
enum rtw_tdmadig_state{
TDMADIG_INIT,
TDMADIG_NON_INIT,
};
#endif
enum phy_cnt {
FA_OFDM,
FA_CCK,
FA_TOTAL,
CCA_OFDM,
CCA_CCK,
CCA_ALL,
CRC32_OK_VHT,
CRC32_OK_HT,
CRC32_OK_LEGACY,
CRC32_OK_CCK,
CRC32_ERROR_VHT,
CRC32_ERROR_HT,
CRC32_ERROR_LEGACY,
CRC32_ERROR_CCK,
};
u32 rtw_phydm_get_phy_cnt(_adapter *adapter, enum phy_cnt cnt);
#if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1) || (RTL8822C_SUPPORT == 1))
void rtw_phydm_iqk_trigger(_adapter *adapter);
#endif
void rtw_phydm_read_efuse(_adapter *adapter);
bool rtw_phydm_set_crystal_cap(_adapter *adapter, u8 crystal_cap);
#ifdef CONFIG_SUPPORT_DYNAMIC_TXPWR
void rtw_phydm_set_dyntxpwr(_adapter *adapter, u8 *desc, u8 mac_id);
#endif
#ifdef CONFIG_RTW_TX_2PATH_EN
void rtw_phydm_tx_2path_en(_adapter *adapter);
#endif
#ifdef CONFIG_LPS_PG
void rtw_phydm_lps_pg_hdl(_adapter *adapter, struct sta_info *sta, bool in_lpspg);
#endif
#ifdef CONFIG_LPS_PWR_TRACKING
void rtw_phydm_pwr_tracking_directly(_adapter *adapter);
#endif
#ifdef CONFIG_CTRL_TXSS_BY_TP
void rtw_phydm_trx_cfg(_adapter *adapter, bool tx_1ss);
#endif
#endif /* __HAL_DM_H__ */

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/******************************************************************************
*
* Copyright(c) 2014 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#include <drv_types.h>
#include <hal_data.h>
#if defined(CONFIG_RTW_ACS) || defined(CONFIG_BACKGROUND_NOISE_MONITOR)
static void _rtw_bss_nums_count(_adapter *adapter, u8 *pbss_nums)
{
struct mlme_priv *pmlmepriv = &(adapter->mlmepriv);
_queue *queue = &(pmlmepriv->scanned_queue);
struct wlan_network *pnetwork = NULL;
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
_list *plist, *phead;
_irqL irqL;
int chan_idx = -1;
if (pbss_nums == NULL) {
RTW_ERR("%s pbss_nums is null pointer\n", __func__);
return;
}
_rtw_memset(pbss_nums, 0, MAX_CHANNEL_NUM);
_enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
phead = get_list_head(queue);
plist = get_next(phead);
while (1) {
if (rtw_end_of_queue_search(phead, plist) == _TRUE)
break;
pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list);
if (!pnetwork)
break;
chan_idx = rtw_chset_search_ch(adapter_to_chset(adapter), pnetwork->network.Configuration.DSConfig);
if ((chan_idx == -1) || (chan_idx >= MAX_CHANNEL_NUM)) {
RTW_ERR("%s can't get chan_idx(CH:%d)\n",
__func__, pnetwork->network.Configuration.DSConfig);
chan_idx = 0;
}
/*if (pnetwork->network.Reserved[0] != BSS_TYPE_PROB_REQ)*/
pbss_nums[chan_idx]++;
plist = get_next(plist);
}
_exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
}
u8 rtw_get_ch_num_by_idx(_adapter *adapter, u8 idx)
{
struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
RT_CHANNEL_INFO *pch_set = rfctl->channel_set;
u8 max_chan_nums = rfctl->max_chan_nums;
if (idx >= max_chan_nums)
return 0;
return pch_set[idx].ChannelNum;
}
#endif /*defined(CONFIG_RTW_ACS) || defined(CONFIG_BACKGROUND_NOISE_MONITOR)*/
#ifdef CONFIG_RTW_ACS
void rtw_acs_version_dump(void *sel, _adapter *adapter)
{
_RTW_PRINT_SEL(sel, "RTK_ACS VER_%d\n", RTK_ACS_VERSION);
}
u8 rtw_phydm_clm_ratio(_adapter *adapter)
{
struct dm_struct *phydm = adapter_to_phydm(adapter);
return phydm_cmn_info_query(phydm, (enum phydm_info_query) PHYDM_INFO_CLM_RATIO);
}
u8 rtw_phydm_nhm_ratio(_adapter *adapter)
{
struct dm_struct *phydm = adapter_to_phydm(adapter);
return phydm_cmn_info_query(phydm, (enum phydm_info_query) PHYDM_INFO_NHM_RATIO);
}
void rtw_acs_reset(_adapter *adapter)
{
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
struct auto_chan_sel *pacs = &hal_data->acs;
_rtw_memset(pacs, 0, sizeof(struct auto_chan_sel));
#ifdef CONFIG_RTW_ACS_DBG
rtw_acs_adv_reset(adapter);
#endif /*CONFIG_RTW_ACS_DBG*/
}
#ifdef CONFIG_RTW_ACS_DBG
u8 rtw_is_acs_igi_valid(_adapter *adapter)
{
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
struct auto_chan_sel *pacs = &hal_data->acs;
if ((pacs->igi) && ((pacs->igi >= 0x1E) || (pacs->igi < 0x60)))
return _TRUE;
return _FALSE;
}
void rtw_acs_adv_setting(_adapter *adapter, RT_SCAN_TYPE scan_type, u16 scan_time, u8 igi, u8 bw)
{
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
struct auto_chan_sel *pacs = &hal_data->acs;
struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
pacs->scan_type = scan_type;
pacs->scan_time = scan_time;
pacs->igi = igi;
pacs->bw = bw;
RTW_INFO("[ACS] ADV setting - scan_type:%c, ch_ms:%d(ms), igi:0x%02x, bw:%d\n",
pacs->scan_type ? 'A' : 'P', pacs->scan_time, pacs->igi, pacs->bw);
}
void rtw_acs_adv_reset(_adapter *adapter)
{
rtw_acs_adv_setting(adapter, SCAN_ACTIVE, 0, 0, 0);
}
#endif /*CONFIG_RTW_ACS_DBG*/
void rtw_acs_trigger(_adapter *adapter, u16 scan_time_ms, u8 scan_chan, enum NHM_PID pid)
{
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
struct dm_struct *phydm = adapter_to_phydm(adapter);
#if (RTK_ACS_VERSION == 3)
struct clm_para_info clm_para;
struct nhm_para_info nhm_para;
struct env_trig_rpt trig_rpt;
scan_time_ms -= 10;
init_acs_clm(clm_para, scan_time_ms);
if (pid == NHM_PID_IEEE_11K_HIGH)
init_11K_high_nhm(nhm_para, scan_time_ms);
else if (pid == NHM_PID_IEEE_11K_LOW)
init_11K_low_nhm(nhm_para, scan_time_ms);
else
init_acs_nhm(nhm_para, scan_time_ms);
hal_data->acs.trig_rst = phydm_env_mntr_trigger(phydm, &nhm_para, &clm_para, &trig_rpt);
if (hal_data->acs.trig_rst == (NHM_SUCCESS | CLM_SUCCESS)) {
hal_data->acs.trig_rpt.clm_rpt_stamp = trig_rpt.clm_rpt_stamp;
hal_data->acs.trig_rpt.nhm_rpt_stamp = trig_rpt.nhm_rpt_stamp;
/*RTW_INFO("[ACS] trigger success (rst = 0x%02x, clm_stamp:%d, nhm_stamp:%d)\n",
hal_data->acs.trig_rst, hal_data->acs.trig_rpt.clm_rpt_stamp, hal_data->acs.trig_rpt.nhm_rpt_stamp);*/
} else
RTW_ERR("[ACS] trigger failed (rst = 0x%02x)\n", hal_data->acs.trig_rst);
#else
phydm_ccx_monitor_trigger(phydm, scan_time_ms);
#endif
hal_data->acs.trigger_ch = scan_chan;
hal_data->acs.triggered = _TRUE;
#ifdef CONFIG_RTW_ACS_DBG
RTW_INFO("[ACS] Trigger CH:%d, Times:%d\n", hal_data->acs.trigger_ch, scan_time_ms);
#endif
}
void rtw_acs_get_rst(_adapter *adapter)
{
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
struct dm_struct *phydm = adapter_to_phydm(adapter);
int chan_idx = -1;
u8 cur_chan = hal_data->acs.trigger_ch;
if (cur_chan == 0)
return;
if (!hal_data->acs.triggered)
return;
chan_idx = rtw_chset_search_ch(adapter_to_chset(adapter), cur_chan);
if ((chan_idx == -1) || (chan_idx >= MAX_CHANNEL_NUM)) {
RTW_ERR("[ACS] %s can't get chan_idx(CH:%d)\n", __func__, cur_chan);
return;
}
#if (RTK_ACS_VERSION == 3)
if (!(hal_data->acs.trig_rst == (NHM_SUCCESS | CLM_SUCCESS))) {
RTW_ERR("[ACS] get_rst return, due to acs trigger failed\n");
return;
}
{
struct env_mntr_rpt rpt = {0};
u8 rst;
rst = phydm_env_mntr_result(phydm, &rpt);
if ((rst == (NHM_SUCCESS | CLM_SUCCESS)) &&
(rpt.clm_rpt_stamp == hal_data->acs.trig_rpt.clm_rpt_stamp) &&
(rpt.nhm_rpt_stamp == hal_data->acs.trig_rpt.nhm_rpt_stamp)){
hal_data->acs.clm_ratio[chan_idx] = rpt.clm_ratio;
hal_data->acs.nhm_ratio[chan_idx] = rpt.nhm_ratio;
_rtw_memcpy(&hal_data->acs.nhm[chan_idx][0], rpt.nhm_result, NHM_RPT_NUM);
/*RTW_INFO("[ACS] get_rst success (rst = 0x%02x, clm_stamp:%d:%d, nhm_stamp:%d:%d)\n",
rst,
hal_data->acs.trig_rpt.clm_rpt_stamp, rpt.clm_rpt_stamp,
hal_data->acs.trig_rpt.nhm_rpt_stamp, rpt.nhm_rpt_stamp);*/
} else {
RTW_ERR("[ACS] get_rst failed (rst = 0x%02x, clm_stamp:%d:%d, nhm_stamp:%d:%d)\n",
rst,
hal_data->acs.trig_rpt.clm_rpt_stamp, rpt.clm_rpt_stamp,
hal_data->acs.trig_rpt.nhm_rpt_stamp, rpt.nhm_rpt_stamp);
}
}
#else
phydm_ccx_monitor_result(phydm);
hal_data->acs.clm_ratio[chan_idx] = rtw_phydm_clm_ratio(adapter);
hal_data->acs.nhm_ratio[chan_idx] = rtw_phydm_nhm_ratio(adapter);
#endif
hal_data->acs.triggered = _FALSE;
#ifdef CONFIG_RTW_ACS_DBG
RTW_INFO("[ACS] Result CH:%d, CLM:%d NHM:%d\n",
cur_chan, hal_data->acs.clm_ratio[chan_idx], hal_data->acs.nhm_ratio[chan_idx]);
#endif
}
void _rtw_phydm_acs_select_best_chan(_adapter *adapter)
{
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
u8 ch_idx;
u8 ch_idx_24g = 0xFF, ch_idx_5g = 0xFF;
u8 min_itf_24g = 0xFF, min_itf_5g = 0xFF;
u8 *pbss_nums = hal_data->acs.bss_nums;
u8 *pclm_ratio = hal_data->acs.clm_ratio;
u8 *pnhm_ratio = hal_data->acs.nhm_ratio;
u8 *pinterference_time = hal_data->acs.interference_time;
u8 max_chan_nums = rfctl->max_chan_nums;
for (ch_idx = 0; ch_idx < max_chan_nums; ch_idx++) {
if (pbss_nums[ch_idx])
pinterference_time[ch_idx] = (pclm_ratio[ch_idx] / 2) + pnhm_ratio[ch_idx];
else
pinterference_time[ch_idx] = pclm_ratio[ch_idx] + pnhm_ratio[ch_idx];
if (rtw_get_ch_num_by_idx(adapter, ch_idx) < 14) {
if (pinterference_time[ch_idx] < min_itf_24g) {
min_itf_24g = pinterference_time[ch_idx];
ch_idx_24g = ch_idx;
}
} else {
if (pinterference_time[ch_idx] < min_itf_5g) {
min_itf_5g = pinterference_time[ch_idx];
ch_idx_5g = ch_idx;
}
}
}
if (ch_idx_24g != 0xFF)
hal_data->acs.best_chan_24g = rtw_get_ch_num_by_idx(adapter, ch_idx_24g);
if (ch_idx_5g != 0xFF)
hal_data->acs.best_chan_5g = rtw_get_ch_num_by_idx(adapter, ch_idx_5g);
hal_data->acs.trigger_ch = 0;
}
void rtw_acs_info_dump(void *sel, _adapter *adapter)
{
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
u8 max_chan_nums = rfctl->max_chan_nums;
u8 ch_idx, ch_num;
_RTW_PRINT_SEL(sel, "========== ACS (VER-%d) ==========\n", RTK_ACS_VERSION);
_RTW_PRINT_SEL(sel, "Best 24G Channel:%d\n", hal_data->acs.best_chan_24g);
_RTW_PRINT_SEL(sel, "Best 5G Channel:%d\n\n", hal_data->acs.best_chan_5g);
#ifdef CONFIG_RTW_ACS_DBG
_RTW_PRINT_SEL(sel, "Advanced setting - scan_type:%c, ch_ms:%d(ms), igi:0x%02x, bw:%d\n",
hal_data->acs.scan_type ? 'A' : 'P', hal_data->acs.scan_time, hal_data->acs.igi, hal_data->acs.bw);
_RTW_PRINT_SEL(sel, "BW 20MHz\n");
_RTW_PRINT_SEL(sel, "%5s %3s %3s %3s(%%) %3s(%%) %3s\n",
"Index", "CH", "BSS", "CLM", "NHM", "ITF");
for (ch_idx = 0; ch_idx < max_chan_nums; ch_idx++) {
ch_num = rtw_get_ch_num_by_idx(adapter, ch_idx);
_RTW_PRINT_SEL(sel, "%5d %3d %3d %6d %6d %3d\n",
ch_idx, ch_num, hal_data->acs.bss_nums[ch_idx],
hal_data->acs.clm_ratio[ch_idx],
hal_data->acs.nhm_ratio[ch_idx],
hal_data->acs.interference_time[ch_idx]);
}
#endif
}
void rtw_acs_select_best_chan(_adapter *adapter)
{
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
_rtw_bss_nums_count(adapter, hal_data->acs.bss_nums);
_rtw_phydm_acs_select_best_chan(adapter);
rtw_acs_info_dump(RTW_DBGDUMP, adapter);
}
void rtw_acs_start(_adapter *adapter)
{
rtw_acs_reset(adapter);
if (GET_ACS_STATE(adapter) != ACS_ENABLE)
SET_ACS_STATE(adapter, ACS_ENABLE);
}
void rtw_acs_stop(_adapter *adapter)
{
SET_ACS_STATE(adapter, ACS_DISABLE);
}
u8 rtw_acs_get_clm_ratio_by_ch_num(_adapter *adapter, u8 chan)
{
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
int chan_idx = -1;
chan_idx = rtw_chset_search_ch(adapter_to_chset(adapter), chan);
if ((chan_idx == -1) || (chan_idx >= MAX_CHANNEL_NUM)) {
RTW_ERR("[ACS] Get CLM fail, can't get chan_idx(CH:%d)\n", chan);
return 0;
}
return hal_data->acs.clm_ratio[chan_idx];
}
u8 rtw_acs_get_clm_ratio_by_ch_idx(_adapter *adapter, u8 ch_idx)
{
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
if (ch_idx >= MAX_CHANNEL_NUM) {
RTW_ERR("%s [ACS] ch_idx(%d) is invalid\n", __func__, ch_idx);
return 0;
}
return hal_data->acs.clm_ratio[ch_idx];
}
u8 rtw_acs_get_nhm_ratio_by_ch_num(_adapter *adapter, u8 chan)
{
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
int chan_idx = -1;
chan_idx = rtw_chset_search_ch(adapter_to_chset(adapter), chan);
if ((chan_idx == -1) || (chan_idx >= MAX_CHANNEL_NUM)) {
RTW_ERR("[ACS] Get NHM fail, can't get chan_idx(CH:%d)\n", chan);
return 0;
}
return hal_data->acs.nhm_ratio[chan_idx];
}
u8 rtw_acs_get_num_ratio_by_ch_idx(_adapter *adapter, u8 ch_idx)
{
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
if (ch_idx >= MAX_CHANNEL_NUM) {
RTW_ERR("%s [ACS] ch_idx(%d) is invalid\n", __func__, ch_idx);
return 0;
}
return hal_data->acs.nhm_ratio[ch_idx];
}
void rtw_acs_chan_info_dump(void *sel, _adapter *adapter)
{
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
u8 max_chan_nums = rfctl->max_chan_nums;
u8 ch_idx, ch_num;
u8 utilization;
_RTW_PRINT_SEL(sel, "BW 20MHz\n");
_RTW_PRINT_SEL(sel, "%5s %3s %7s(%%) %12s(%%) %11s(%%) %9s(%%) %8s(%%)\n",
"Index", "CH", "Quality", "Availability", "Utilization",
"WIFI Util", "Interference Util");
for (ch_idx = 0; ch_idx < max_chan_nums; ch_idx++) {
ch_num = rtw_get_ch_num_by_idx(adapter, ch_idx);
utilization = hal_data->acs.clm_ratio[ch_idx] + hal_data->acs.nhm_ratio[ch_idx];
_RTW_PRINT_SEL(sel, "%5d %3d %7d %12d %12d %12d %12d\n",
ch_idx, ch_num,
(100-hal_data->acs.interference_time[ch_idx]),
(100-utilization),
utilization,
hal_data->acs.clm_ratio[ch_idx],
hal_data->acs.nhm_ratio[ch_idx]);
}
}
void rtw_acs_current_info_dump(void *sel, _adapter *adapter)
{
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
u8 ch, cen_ch, bw, offset;
_RTW_PRINT_SEL(sel, "========== ACS (VER-%d) ==========\n", RTK_ACS_VERSION);
ch = rtw_get_oper_ch(adapter);
bw = rtw_get_oper_bw(adapter);
offset = rtw_get_oper_choffset(adapter);
_RTW_PRINT_SEL(sel, "Current Channel:%d\n", ch);
if ((bw == CHANNEL_WIDTH_80) ||(bw == CHANNEL_WIDTH_40)) {
cen_ch = rtw_get_center_ch(ch, bw, offset);
_RTW_PRINT_SEL(sel, "Center Channel:%d\n", cen_ch);
}
_RTW_PRINT_SEL(sel, "Current BW %s\n", ch_width_str(bw));
if (0)
_RTW_PRINT_SEL(sel, "Current IGI 0x%02x\n", rtw_phydm_get_cur_igi(adapter));
_RTW_PRINT_SEL(sel, "CLM:%d, NHM:%d\n\n",
hal_data->acs.cur_ch_clm_ratio, hal_data->acs.cur_ch_nhm_ratio);
}
void rtw_acs_update_current_info(_adapter *adapter)
{
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
hal_data->acs.cur_ch_clm_ratio = rtw_phydm_clm_ratio(adapter);
hal_data->acs.cur_ch_nhm_ratio = rtw_phydm_nhm_ratio(adapter);
#ifdef CONFIG_RTW_ACS_DBG
rtw_acs_current_info_dump(RTW_DBGDUMP, adapter);
#endif
}
#endif /*CONFIG_RTW_ACS*/
#ifdef CONFIG_BACKGROUND_NOISE_MONITOR
void rtw_noise_monitor_version_dump(void *sel, _adapter *adapter)
{
_RTW_PRINT_SEL(sel, "RTK_NOISE_MONITOR VER_%d\n", RTK_NOISE_MONITOR_VERSION);
}
void rtw_nm_enable(_adapter *adapter)
{
SET_NM_STATE(adapter, NM_ENABLE);
}
void rtw_nm_disable(_adapter *adapter)
{
SET_NM_STATE(adapter, NM_DISABLE);
}
void rtw_noise_info_dump(void *sel, _adapter *adapter)
{
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
u8 max_chan_nums = rfctl->max_chan_nums;
u8 ch_idx, ch_num;
_RTW_PRINT_SEL(sel, "========== NM (VER-%d) ==========\n", RTK_NOISE_MONITOR_VERSION);
_RTW_PRINT_SEL(sel, "%5s %3s %3s %10s", "Index", "CH", "BSS", "Noise(dBm)\n");
_rtw_bss_nums_count(adapter, hal_data->nm.bss_nums);
for (ch_idx = 0; ch_idx < max_chan_nums; ch_idx++) {
ch_num = rtw_get_ch_num_by_idx(adapter, ch_idx);
_RTW_PRINT_SEL(sel, "%5d %3d %3d %10d\n",
ch_idx, ch_num, hal_data->nm.bss_nums[ch_idx],
hal_data->nm.noise[ch_idx]);
}
}
void rtw_noise_measure(_adapter *adapter, u8 chan, u8 is_pause_dig, u8 igi_value, u32 max_time)
{
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
struct dm_struct *phydm = &hal_data->odmpriv;
int chan_idx = -1;
s16 noise = 0;
#ifdef DBG_NOISE_MONITOR
RTW_INFO("[NM] chan(%d)-PauseDIG:%s, IGIValue:0x%02x, max_time:%d (ms)\n",
chan, (is_pause_dig) ? "Y" : "N", igi_value, max_time);
#endif
chan_idx = rtw_chset_search_ch(adapter_to_chset(adapter), chan);
if ((chan_idx == -1) || (chan_idx >= MAX_CHANNEL_NUM)) {
RTW_ERR("[NM] Get noise fail, can't get chan_idx(CH:%d)\n", chan);
return;
}
noise = odm_inband_noise_monitor(phydm, is_pause_dig, igi_value, max_time); /*dBm*/
hal_data->nm.noise[chan_idx] = noise;
#ifdef DBG_NOISE_MONITOR
RTW_INFO("[NM] %s chan_%d, noise = %d (dBm)\n", __func__, chan, hal_data->nm.noise[chan_idx]);
RTW_INFO("[NM] noise_a = %d, noise_b = %d noise_all:%d\n",
phydm->noise_level.noise[RF_PATH_A],
phydm->noise_level.noise[RF_PATH_B],
phydm->noise_level.noise_all);
#endif /*DBG_NOISE_MONITOR*/
}
s16 rtw_noise_query_by_chan_num(_adapter *adapter, u8 chan)
{
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
s16 noise = 0;
int chan_idx = -1;
chan_idx = rtw_chset_search_ch(adapter_to_chset(adapter), chan);
if ((chan_idx == -1) || (chan_idx >= MAX_CHANNEL_NUM)) {
RTW_ERR("[NM] Get noise fail, can't get chan_idx(CH:%d)\n", chan);
return noise;
}
noise = hal_data->nm.noise[chan_idx];
#ifdef DBG_NOISE_MONITOR
RTW_INFO("[NM] %s chan_%d, noise = %d (dBm)\n", __func__, chan, noise);
#endif/*DBG_NOISE_MONITOR*/
return noise;
}
s16 rtw_noise_query_by_chan_idx(_adapter *adapter, u8 ch_idx)
{
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
s16 noise = 0;
if (ch_idx >= MAX_CHANNEL_NUM) {
RTW_ERR("[NM] %s ch_idx(%d) is invalid\n", __func__, ch_idx);
return noise;
}
noise = hal_data->nm.noise[ch_idx];
#ifdef DBG_NOISE_MONITOR
RTW_INFO("[NM] %s ch_idx %d, noise = %d (dBm)\n", __func__, ch_idx, noise);
#endif/*DBG_NOISE_MONITOR*/
return noise;
}
s16 rtw_noise_measure_curchan(_adapter *padapter)
{
s16 noise = 0;
u8 igi_value = 0x1E;
u32 max_time = 100;/* ms */
u8 is_pause_dig = _TRUE;
u8 cur_chan = rtw_get_oper_ch(padapter);
if (rtw_linked_check(padapter) == _FALSE)
return noise;
rtw_ps_deny(padapter, PS_DENY_IOCTL);
LeaveAllPowerSaveModeDirect(padapter);
rtw_noise_measure(padapter, cur_chan, is_pause_dig, igi_value, max_time);
noise = rtw_noise_query_by_chan_num(padapter, cur_chan);
rtw_ps_deny_cancel(padapter, PS_DENY_IOCTL);
return noise;
}
#endif /*CONFIG_BACKGROUND_NOISE_MONITOR*/

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __HAL_DM_ACS_H__
#define __HAL_DM_ACS_H__
#ifdef CONFIG_RTW_ACS
#define RTK_ACS_VERSION 3
#if (RTK_ACS_VERSION == 3)
enum NHM_PID {
NHM_PID_ACS,
NHM_PID_IEEE_11K_HIGH,
NHM_PID_IEEE_11K_LOW,
};
#define init_clm_param(clm, app, lv, time) \
do {\
clm.clm_app = app;\
clm.clm_lv = lv;\
clm.mntr_time = time;\
} while (0)
#define init_nhm_param(nhm, txon, cca, cnt_opt, app, lv, time) \
do {\
nhm.incld_txon = txon;\
nhm.incld_cca = cca;\
nhm.div_opt = cnt_opt;\
nhm.nhm_app = app;\
nhm.nhm_lv = lv;\
nhm.mntr_time = time;\
} while (0)
#define init_acs_clm(clm, time) \
init_clm_param(clm, CLM_ACS, CLM_LV_2, time)
#define init_acs_nhm(nhm, time) \
init_nhm_param(nhm, NHM_EXCLUDE_TXON, NHM_EXCLUDE_CCA, NHM_CNT_ALL, NHM_ACS, NHM_LV_2, time)
#define init_11K_high_nhm(nhm, time) \
init_nhm_param(nhm, NHM_EXCLUDE_TXON, NHM_EXCLUDE_CCA, NHM_CNT_ALL, IEEE_11K_HIGH, NHM_LV_2, time)
#define init_11K_low_nhm(nhm, time) \
init_nhm_param(nhm, NHM_EXCLUDE_TXON, NHM_EXCLUDE_CCA, NHM_CNT_ALL, IEEE_11K_LOW, NHM_LV_2, time)
#endif /*(RTK_ACS_VERSION == 3)*/
void rtw_acs_version_dump(void *sel, _adapter *adapter);
extern void phydm_ccx_monitor_trigger(void *p_dm_void, u16 monitor_time);
extern void phydm_ccx_monitor_result(void *p_dm_void);
#define GET_ACS_STATE(padapter) (ATOMIC_READ(&GET_HAL_DATA(padapter)->acs.state))
#define SET_ACS_STATE(padapter, set_state) (ATOMIC_SET(&GET_HAL_DATA(padapter)->acs.state, set_state))
#define IS_ACS_ENABLE(padapter) ((GET_ACS_STATE(padapter) == ACS_ENABLE) ? _TRUE : _FALSE)
enum ACS_STATE {
ACS_DISABLE,
ACS_ENABLE,
};
#define ACS_BW_20M BIT(0)
#define ACS_BW_40M BIT(1)
#define ACS_BW_80M BIT(2)
#define ACS_BW_160M BIT(3)
struct auto_chan_sel {
ATOMIC_T state;
u8 trigger_ch;
bool triggered;
u8 clm_ratio[MAX_CHANNEL_NUM];
u8 nhm_ratio[MAX_CHANNEL_NUM];
#if (RTK_ACS_VERSION == 3)
u8 nhm[MAX_CHANNEL_NUM][NHM_RPT_NUM];
#endif
u8 bss_nums[MAX_CHANNEL_NUM];
u8 interference_time[MAX_CHANNEL_NUM];
u8 cur_ch_clm_ratio;
u8 cur_ch_nhm_ratio;
u8 best_chan_5g;
u8 best_chan_24g;
#if (RTK_ACS_VERSION == 3)
u8 trig_rst;
struct env_trig_rpt trig_rpt;
#endif
#ifdef CONFIG_RTW_ACS_DBG
RT_SCAN_TYPE scan_type;
u16 scan_time;
u8 igi;
u8 bw;
#endif
};
#define rtw_acs_get_best_chan_24g(adapter) (GET_HAL_DATA(adapter)->acs.best_chan_24g)
#define rtw_acs_get_best_chan_5g(adapter) (GET_HAL_DATA(adapter)->acs.best_chan_5g)
#ifdef CONFIG_RTW_ACS_DBG
#define rtw_is_acs_passiv_scan(adapter) (((GET_HAL_DATA(adapter)->acs.scan_type) == SCAN_PASSIVE) ? _TRUE : _FALSE)
#define rtw_acs_get_adv_st(adapter) (GET_HAL_DATA(adapter)->acs.scan_time)
#define rtw_is_acs_st_valid(adapter) ((GET_HAL_DATA(adapter)->acs.scan_time) ? _TRUE : _FALSE)
#define rtw_acs_get_adv_igi(adapter) (GET_HAL_DATA(adapter)->acs.igi)
u8 rtw_is_acs_igi_valid(_adapter *adapter);
#define rtw_acs_get_adv_bw(adapter) (GET_HAL_DATA(adapter)->acs.bw)
void rtw_acs_adv_setting(_adapter *adapter, RT_SCAN_TYPE scan_type, u16 scan_time, u8 igi, u8 bw);
void rtw_acs_adv_reset(_adapter *adapter);
#endif
u8 rtw_acs_get_clm_ratio_by_ch_num(_adapter *adapter, u8 chan);
u8 rtw_acs_get_clm_ratio_by_ch_idx(_adapter *adapter, u8 ch_idx);
u8 rtw_acs_get_nhm_ratio_by_ch_num(_adapter *adapter, u8 chan);
u8 rtw_acs_get_num_ratio_by_ch_idx(_adapter *adapter, u8 ch_idx);
void rtw_acs_reset(_adapter *adapter);
void rtw_acs_trigger(_adapter *adapter, u16 scan_time_ms, u8 scan_chan, enum NHM_PID pid);
void rtw_acs_get_rst(_adapter *adapter);
void rtw_acs_select_best_chan(_adapter *adapter);
void rtw_acs_info_dump(void *sel, _adapter *adapter);
void rtw_acs_update_current_info(_adapter *adapter);
void rtw_acs_chan_info_dump(void *sel, _adapter *adapter);
void rtw_acs_current_info_dump(void *sel, _adapter *adapter);
void rtw_acs_start(_adapter *adapter);
void rtw_acs_stop(_adapter *adapter);
#endif /*CONFIG_RTW_ACS*/
#ifdef CONFIG_BACKGROUND_NOISE_MONITOR
#define RTK_NOISE_MONITOR_VERSION 3
#define GET_NM_STATE(padapter) (ATOMIC_READ(&GET_HAL_DATA(padapter)->nm.state))
#define SET_NM_STATE(padapter, set_state) (ATOMIC_SET(&GET_HAL_DATA(padapter)->nm.state, set_state))
#define IS_NM_ENABLE(padapter) ((GET_NM_STATE(padapter) == NM_ENABLE) ? _TRUE : _FALSE)
enum NM_STATE {
NM_DISABLE,
NM_ENABLE,
};
struct noise_monitor {
ATOMIC_T state;
s16 noise[MAX_CHANNEL_NUM];
u8 bss_nums[MAX_CHANNEL_NUM];
};
void rtw_nm_enable(_adapter *adapter);
void rtw_nm_disable(_adapter *adapter);
void rtw_noise_measure(_adapter *adapter, u8 chan, u8 is_pause_dig, u8 igi_value, u32 max_time);
s16 rtw_noise_query_by_chan_num(_adapter *adapter, u8 chan);
s16 rtw_noise_query_by_chan_idx(_adapter *adapter, u8 ch_idx);
s16 rtw_noise_measure_curchan(_adapter *padapter);
void rtw_noise_info_dump(void *sel, _adapter *adapter);
#endif
#endif /* __HAL_DM_ACS_H__ */

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/******************************************************************************
*
* Copyright(c) 2015 - 2019 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef _HAL_HALMAC_H_
#define _HAL_HALMAC_H_
#include <drv_types.h> /* adapter_to_dvobj(), struct intf_hdl and etc. */
#include <hal_data.h> /* struct hal_spec_t */
#include "halmac/halmac_api.h" /* struct halmac_adapter* and etc. */
/* HALMAC Definition for Driver */
#define RTW_HALMAC_H2C_MAX_SIZE 8
#define RTW_HALMAC_BA_SSN_RPT_SIZE 4
#define dvobj_set_halmac(d, mac) ((d)->halmac = (mac))
#define dvobj_to_halmac(d) ((struct halmac_adapter *)((d)->halmac))
#define adapter_to_halmac(p) dvobj_to_halmac(adapter_to_dvobj(p))
/* for H2C cmd */
#define MAX_H2C_BOX_NUMS 4
#define MESSAGE_BOX_SIZE 4
#define EX_MESSAGE_BOX_SIZE 4
typedef enum _RTW_HALMAC_MODE {
RTW_HALMAC_MODE_NORMAL,
RTW_HALMAC_MODE_WIFI_TEST,
} RTW_HALMAC_MODE;
union rtw_phy_para_data {
struct _mac {
u32 value; /* value to be set in bit mask(msk) */
u32 msk; /* bit mask */
u16 offset; /* address */
u8 msk_en; /* 0/1 for msk invalid/valid */
u8 size; /* Unit is bytes, and value should be 1/2/4 */
} mac;
struct _bb {
u32 value;
u32 msk;
u16 offset;
u8 msk_en;
u8 size;
} bb;
struct _rf {
u32 value;
u32 msk;
u8 offset;
u8 msk_en;
/*
* 0: path A
* 1: path B
* 2: path C
* 3: path D
*/
u8 path;
} rf;
struct _delay {
/*
* 0: microsecond (us)
* 1: millisecond (ms)
*/
u8 unit;
u16 value;
} delay;
};
struct rtw_phy_parameter {
/*
* 0: MAC register
* 1: BB register
* 2: RF register
* 3: Delay
* 0xFF: Latest(End) command
*/
u8 cmd;
union rtw_phy_para_data data;
};
struct rtw_halmac_bcn_ctrl {
u8 rx_bssid_fit:1; /* 0:HW handle beacon, 1:ignore */
u8 txbcn_rpt:1; /* Enable TXBCN report in ad hoc and AP mode */
u8 tsf_update:1; /* Update TSF when beacon or probe response */
u8 enable_bcn:1; /* Enable beacon related functions */
u8 rxbcn_rpt:1; /* Enable RXBCNOK report */
u8 p2p_ctwin:1; /* Enable P2P CTN WINDOWS function */
u8 p2p_bcn_area:1; /* Enable P2P BCN area on function */
};
extern struct halmac_platform_api rtw_halmac_platform_api;
/* HALMAC API for Driver(HAL) */
u8 rtw_halmac_read8(struct intf_hdl *, u32 addr);
u16 rtw_halmac_read16(struct intf_hdl *, u32 addr);
u32 rtw_halmac_read32(struct intf_hdl *, u32 addr);
void rtw_halmac_read_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
#ifdef CONFIG_SDIO_INDIRECT_ACCESS
u8 rtw_halmac_iread8(struct intf_hdl *pintfhdl, u32 addr);
u16 rtw_halmac_iread16(struct intf_hdl *pintfhdl, u32 addr);
u32 rtw_halmac_iread32(struct intf_hdl *pintfhdl, u32 addr);
#endif /* CONFIG_SDIO_INDIRECT_ACCESS */
int rtw_halmac_write8(struct intf_hdl *, u32 addr, u8 value);
int rtw_halmac_write16(struct intf_hdl *, u32 addr, u16 value);
int rtw_halmac_write32(struct intf_hdl *, u32 addr, u32 value);
/* Software Information */
void rtw_halmac_get_version(char *str, u32 len);
/* Software Initialization */
int rtw_halmac_init_adapter(struct dvobj_priv *d, struct halmac_platform_api *pf_api);
int rtw_halmac_deinit_adapter(struct dvobj_priv *);
/* Get operations */
int rtw_halmac_get_hw_value(struct dvobj_priv *d, enum halmac_hw_id hw_id, void *pvalue);
int rtw_halmac_get_tx_fifo_size(struct dvobj_priv *d, u32 *size);
int rtw_halmac_get_rx_fifo_size(struct dvobj_priv *d, u32 *size);
int rtw_halmac_get_rsvd_drv_pg_bndy(struct dvobj_priv *d, u16 *bndy);
int rtw_halmac_get_page_size(struct dvobj_priv *d, u32 *size);
int rtw_halmac_get_tx_agg_align_size(struct dvobj_priv *d, u16 *size);
int rtw_halmac_get_rx_agg_align_size(struct dvobj_priv *d, u8 *size);
int rtw_halmac_get_rx_drv_info_sz(struct dvobj_priv *, u8 *sz);
int rtw_halmac_get_tx_desc_size(struct dvobj_priv *d, u32 *size);
int rtw_halmac_get_rx_desc_size(struct dvobj_priv *d, u32 *size);
int rtw_halmac_get_ori_h2c_size(struct dvobj_priv *d, u32 *size);
int rtw_halmac_get_oqt_size(struct dvobj_priv *d, u8 *size);
int rtw_halmac_get_ac_queue_number(struct dvobj_priv *d, u8 *num);
int rtw_halmac_get_mac_address(struct dvobj_priv *d, enum _hw_port hwport, u8 *addr);
int rtw_halmac_get_network_type(struct dvobj_priv *d, enum _hw_port hwport, u8 *type);
int rtw_halmac_get_bcn_ctrl(struct dvobj_priv *d, enum _hw_port hwport, struct rtw_halmac_bcn_ctrl *bcn_ctrl);
/*int rtw_halmac_get_wow_reason(struct dvobj_priv *, u8 *reason);*/
/* Set operations */
int rtw_halmac_config_rx_info(struct dvobj_priv *d, enum halmac_drv_info info);
int rtw_halmac_set_max_dl_fw_size(struct dvobj_priv *d, u32 size);
int rtw_halmac_set_mac_address(struct dvobj_priv *d, enum _hw_port hwport, u8 *addr);
int rtw_halmac_set_bssid(struct dvobj_priv *d, enum _hw_port hwport, u8 *addr);
int rtw_halmac_set_tx_address(struct dvobj_priv *d, enum _hw_port hwport, u8 *addr);
int rtw_halmac_set_network_type(struct dvobj_priv *d, enum _hw_port hwport, u8 type);
int rtw_halmac_reset_tsf(struct dvobj_priv *d, enum _hw_port hwport);
int rtw_halmac_set_bcn_interval(struct dvobj_priv *d, enum _hw_port hwport, u32 space);
int rtw_halmac_set_bcn_ctrl(struct dvobj_priv *d, enum _hw_port hwport, struct rtw_halmac_bcn_ctrl *bcn_ctrl);
int rtw_halmac_set_aid(struct dvobj_priv *d, enum _hw_port hwport, u16 aid);
int rtw_halmac_set_bandwidth(struct dvobj_priv *d, u8 channel, u8 pri_ch_idx, u8 bw);
int rtw_halmac_set_edca(struct dvobj_priv *d, u8 queue, u8 aifs, u8 cw, u16 txop);
int rtw_halmac_set_rts_full_bw(struct dvobj_priv *d, u8 enable);
/* Functions */
int rtw_halmac_poweron(struct dvobj_priv *);
int rtw_halmac_poweroff(struct dvobj_priv *);
int rtw_halmac_init_hal(struct dvobj_priv *);
int rtw_halmac_init_hal_fw(struct dvobj_priv *, u8 *fw, u32 fwsize);
int rtw_halmac_init_hal_fw_file(struct dvobj_priv *, u8 *fwpath);
int rtw_halmac_deinit_hal(struct dvobj_priv *);
int rtw_halmac_self_verify(struct dvobj_priv *);
int rtw_halmac_txfifo_wait_empty(struct dvobj_priv *d, u32 timeout);
int rtw_halmac_dlfw(struct dvobj_priv *, u8 *fw, u32 fwsize);
int rtw_halmac_dlfw_from_file(struct dvobj_priv *, u8 *fwpath);
int rtw_halmac_dlfw_mem(struct dvobj_priv *d, u8 *fw, u32 fwsize, enum fw_mem mem);
int rtw_halmac_dlfw_mem_from_file(struct dvobj_priv *d, u8 *fwpath, enum fw_mem mem);
int rtw_halmac_phy_power_switch(struct dvobj_priv *, u8 enable);
int rtw_halmac_send_h2c(struct dvobj_priv *, u8 *h2c);
int rtw_halmac_c2h_handle(struct dvobj_priv *, u8 *c2h, u32 size);
/* eFuse */
int rtw_halmac_get_available_efuse_size(struct dvobj_priv *d, u32 *size);
int rtw_halmac_get_physical_efuse_size(struct dvobj_priv *, u32 *size);
int rtw_halmac_read_physical_efuse_map(struct dvobj_priv *, u8 *map, u32 size);
int rtw_halmac_read_physical_efuse(struct dvobj_priv *, u32 offset, u32 cnt, u8 *data);
int rtw_halmac_write_physical_efuse(struct dvobj_priv *, u32 offset, u32 cnt, u8 *data);
int rtw_halmac_get_logical_efuse_size(struct dvobj_priv *, u32 *size);
int rtw_halmac_read_logical_efuse_map(struct dvobj_priv *, u8 *map, u32 size, u8 *maskmap, u32 masksize);
int rtw_halmac_write_logical_efuse_map(struct dvobj_priv *, u8 *map, u32 size, u8 *maskmap, u32 masksize);
int rtw_halmac_read_logical_efuse(struct dvobj_priv *, u32 offset, u32 cnt, u8 *data);
int rtw_halmac_write_logical_efuse(struct dvobj_priv *, u32 offset, u32 cnt, u8 *data);
int rtw_halmac_write_bt_physical_efuse(struct dvobj_priv *, u32 offset, u32 cnt, u8 *data);
int rtw_halmac_read_bt_physical_efuse_map(struct dvobj_priv *, u8 *map, u32 size);
int rtw_halmac_dump_fifo(struct dvobj_priv *d, u8 fifo_sel, u32 addr, u32 size, u8 *buffer);
int rtw_halmac_rx_agg_switch(struct dvobj_priv *, u8 enable);
/* Specific function APIs*/
int rtw_halmac_download_rsvd_page(struct dvobj_priv *dvobj, u8 pg_offset, u8 *pbuf, u32 size);
int rtw_halmac_fill_hal_spec(struct dvobj_priv *, struct hal_spec_t *);
int rtw_halmac_p2pps(struct dvobj_priv *dvobj, PHAL_P2P_PS_PARA pp2p_ps_para);
int rtw_halmac_iqk(struct dvobj_priv *d, u8 clear, u8 segment);
int rtw_halmac_cfg_phy_para(struct dvobj_priv *d, struct rtw_phy_parameter *para);
int rtw_halmac_led_cfg(struct dvobj_priv *d, u8 enable, u8 mode);
void rtw_halmac_led_switch(struct dvobj_priv *d, u8 on);
int rtw_halmac_bt_wake_cfg(struct dvobj_priv *d, u8 enable);
#ifdef CONFIG_PNO_SUPPORT
int rtw_halmac_pno_scanoffload(struct dvobj_priv *d, u32 enable);
#endif
#ifdef CONFIG_SDIO_HCI
int rtw_halmac_query_tx_page_num(struct dvobj_priv *);
int rtw_halmac_get_tx_queue_page_num(struct dvobj_priv *, u8 queue, u32 *page);
u32 rtw_halmac_sdio_get_tx_addr(struct dvobj_priv *, u8 *desc, u32 size);
int rtw_halmac_sdio_tx_allowed(struct dvobj_priv *, u8 *buf, u32 size);
u32 rtw_halmac_sdio_get_rx_addr(struct dvobj_priv *, u8 *seq);
int rtw_halmac_sdio_set_tx_format(struct dvobj_priv *d, enum halmac_sdio_tx_format format);
#ifdef CONFIG_SDIO_MONITOR
u32 rtw_halmac_sdio_get_int_lat(struct dvobj_priv *d);
u32 rtw_halmac_sdio_get_lk_cnt(struct dvobj_priv *d);
int rtw_halmac_sdio_set_wt_en(struct dvobj_priv *d);
int rtw_halmac_set_sdio_clk_monitor(struct dvobj_priv *d, u8 clk_monitor_mode);
#endif
#endif /* CONFIG_SDIO_HCI */
#ifdef CONFIG_USB_HCI
u8 rtw_halmac_usb_get_bulkout_id(struct dvobj_priv *, u8 *buf, u32 size);
int rtw_halmac_usb_get_txagg_desc_num(struct dvobj_priv *d, u8 *num);
u8 rtw_halmac_switch_usb_mode(struct dvobj_priv *d, enum RTW_USB_SPEED usb_mode);
#endif /* CONFIG_USB_HCI */
#ifdef CONFIG_SUPPORT_TRX_SHARED
void dump_trx_share_mode(void *sel, _adapter *adapter);
#endif
#ifdef CONFIG_BEAMFORMING
#ifdef RTW_BEAMFORMING_VERSION_2
int rtw_halmac_bf_add_mu_bfer(struct dvobj_priv *d, u16 paid, u16 csi_para,
u16 my_aid, enum halmac_csi_seg_len sel, u8 *addr);
int rtw_halmac_bf_del_mu_bfer(struct dvobj_priv *d);
int rtw_halmac_bf_cfg_sounding(struct dvobj_priv *d, enum halmac_snd_role role,
enum halmac_data_rate rate);
int rtw_halmac_bf_del_sounding(struct dvobj_priv *d, enum halmac_snd_role role);
int rtw_halmac_bf_cfg_csi_rate(struct dvobj_priv *d, u8 rssi, u8 current_rate,
u8 fixrate_en, u8 *new_rate, u8 *bmp_ofdm54);
int rtw_halmac_bf_cfg_mu_mimo(struct dvobj_priv *d, enum halmac_snd_role role,
u8 *sounding_sts, u16 grouping_bitmap, u8 mu_tx_en,
u32 *given_gid_tab, u32 *given_user_pos);
#define rtw_halmac_bf_cfg_mu_bfee(d, gid_tab, user_pos) \
rtw_halmac_bf_cfg_mu_mimo(d, HAL_BFEE, NULL, 0, 0, gid_tab, user_pos)
#endif /* RTW_BEAMFORMING_VERSION_2 */
#endif /* CONFIG_BEAMFORMING */
#endif /* _HAL_HALMAC_H_ */

703
hal/hal_hci/hal_sdio.c Normal file
View File

@ -0,0 +1,703 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#define _HAL_SDIO_C_
#include <drv_types.h>
#include <hal_data.h>
#ifndef RTW_HALMAC
static void dump_mac_page0(PADAPTER padapter)
{
char str_out[128];
char str_val[8];
char *p = NULL;
int index = 0, i = 0;
u8 val8 = 0, len = 0;
RTW_ERR("Dump MAC Page0 register:\n");
for (index = 0 ; index < 0x100 ; index += 16) {
p = &str_out[0];
len = snprintf(str_val, sizeof(str_val),
"0x%02x: ", index);
strncpy(str_out, str_val, len);
p += len;
for (i = 0 ; i < 16 ; i++) {
len = snprintf(str_val, sizeof(str_val), "%02x ",
rtw_read8(padapter, index + i));
strncpy(p, str_val, len);
p += len;
}
RTW_INFO("%s\n", str_out);
_rtw_memset(&str_out, '\0', sizeof(str_out));
}
}
/*
* Description:
* Call this function to make sure power on successfully
*
* Return:
* _SUCCESS enable success
* _FAIL enable fail
*/
bool sdio_power_on_check(PADAPTER padapter) {
u32 val_offset0, val_offset1, val_offset2, val_offset3;
u32 val_mix = 0;
u32 res = 0;
bool ret = _FAIL;
int index = 0;
val_offset0 = rtw_read8(padapter, REG_CR);
val_offset1 = rtw_read8(padapter, REG_CR + 1);
val_offset2 = rtw_read8(padapter, REG_CR + 2);
val_offset3 = rtw_read8(padapter, REG_CR + 3);
if (val_offset0 == 0xEA || val_offset1 == 0xEA ||
val_offset2 == 0xEA || val_offset3 == 0xEA) {
RTW_INFO("%s: power on fail, do Power on again\n", __func__);
return ret;
}
val_mix = val_offset3 << 24 | val_mix;
val_mix = val_offset2 << 16 | val_mix;
val_mix = val_offset1 << 8 | val_mix;
val_mix = val_offset0 | val_mix;
res = rtw_read32(padapter, REG_CR);
RTW_INFO("%s: val_mix:0x%08x, res:0x%08x\n", __func__, val_mix, res);
while (index < 100) {
if (res == val_mix) {
RTW_INFO("%s: 0x100 the result of cmd52 and cmd53 is the same.\n", __func__);
ret = _SUCCESS;
break;
} else {
RTW_INFO("%s: 0x100 cmd52 and cmd53 is not the same(index:%d).\n", __func__, index);
res = rtw_read32(padapter, REG_CR);
index++;
ret = _FAIL;
}
}
if (ret) {
index = 0;
while (index < 100) {
rtw_write32(padapter, 0x1B8, 0x12345678);
res = rtw_read32(padapter, 0x1B8);
if (res == 0x12345678) {
RTW_INFO("%s: 0x1B8 test Pass.\n", __func__);
ret = _SUCCESS;
break;
} else {
index++;
RTW_INFO("%s: 0x1B8 test Fail(index: %d).\n", __func__, index);
ret = _FAIL;
}
}
} else
RTW_INFO("%s: fail at cmd52, cmd53.\n", __func__);
if (ret == _FAIL)
dump_mac_page0(padapter);
return ret;
}
u8 rtw_hal_sdio_max_txoqt_free_space(_adapter *padapter)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
if (pHalData->SdioTxOQTMaxFreeSpace < 8)
pHalData->SdioTxOQTMaxFreeSpace = 8;
return pHalData->SdioTxOQTMaxFreeSpace;
}
u8 rtw_hal_sdio_query_tx_freepage(_adapter *padapter, u8 PageIdx, u8 RequiredPageNum)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
if ((pHalData->SdioTxFIFOFreePage[PageIdx] + pHalData->SdioTxFIFOFreePage[PUBLIC_QUEUE_IDX]) >= (RequiredPageNum))
return _TRUE;
else
return _FALSE;
}
void rtw_hal_sdio_update_tx_freepage(_adapter *padapter, u8 PageIdx, u8 RequiredPageNum)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
u8 DedicatedPgNum = 0;
u8 RequiredPublicFreePgNum = 0;
/* _irqL irql; */
/* _enter_critical_bh(&pHalData->SdioTxFIFOFreePageLock, &irql); */
DedicatedPgNum = pHalData->SdioTxFIFOFreePage[PageIdx];
if (RequiredPageNum <= DedicatedPgNum)
pHalData->SdioTxFIFOFreePage[PageIdx] -= RequiredPageNum;
else {
pHalData->SdioTxFIFOFreePage[PageIdx] = 0;
RequiredPublicFreePgNum = RequiredPageNum - DedicatedPgNum;
pHalData->SdioTxFIFOFreePage[PUBLIC_QUEUE_IDX] -= RequiredPublicFreePgNum;
}
/* _exit_critical_bh(&pHalData->SdioTxFIFOFreePageLock, &irql); */
}
void rtw_hal_set_sdio_tx_max_length(PADAPTER padapter, u8 numHQ, u8 numNQ, u8 numLQ, u8 numPubQ, u8 div_num)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
u32 page_size;
u32 lenHQ, lenNQ, lenLQ;
rtw_hal_get_def_var(padapter, HAL_DEF_TX_PAGE_SIZE, &page_size);
lenHQ = ((numHQ + numPubQ) / div_num) * page_size;
lenNQ = ((numNQ + numPubQ) / div_num) * page_size;
lenLQ = ((numLQ + numPubQ) / div_num) * page_size;
pHalData->sdio_tx_max_len[HI_QUEUE_IDX] = (lenHQ > MAX_XMITBUF_SZ) ? MAX_XMITBUF_SZ : lenHQ;
pHalData->sdio_tx_max_len[MID_QUEUE_IDX] = (lenNQ > MAX_XMITBUF_SZ) ? MAX_XMITBUF_SZ : lenNQ;
pHalData->sdio_tx_max_len[LOW_QUEUE_IDX] = (lenLQ > MAX_XMITBUF_SZ) ? MAX_XMITBUF_SZ : lenLQ;
}
u32 rtw_hal_get_sdio_tx_max_length(PADAPTER padapter, u8 queue_idx)
{
struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
u32 deviceId, max_len;
deviceId = ffaddr2deviceId(pdvobjpriv, queue_idx);
switch (deviceId) {
case WLAN_TX_HIQ_DEVICE_ID:
max_len = pHalData->sdio_tx_max_len[HI_QUEUE_IDX];
break;
case WLAN_TX_MIQ_DEVICE_ID:
max_len = pHalData->sdio_tx_max_len[MID_QUEUE_IDX];
break;
case WLAN_TX_LOQ_DEVICE_ID:
max_len = pHalData->sdio_tx_max_len[LOW_QUEUE_IDX];
break;
default:
max_len = pHalData->sdio_tx_max_len[MID_QUEUE_IDX];
break;
}
return max_len;
}
#ifdef CONFIG_FW_C2H_REG
void sd_c2h_hisr_hdl(_adapter *adapter)
{
u8 c2h_evt[C2H_REG_LEN] = {0};
u8 id, seq, plen;
u8 *payload;
if (rtw_hal_c2h_evt_read(adapter, c2h_evt) != _SUCCESS)
goto exit;
if (rtw_hal_c2h_reg_hdr_parse(adapter, c2h_evt, &id, &seq, &plen, &payload) != _SUCCESS)
goto exit;
if (rtw_hal_c2h_id_handle_directly(adapter, id, seq, plen, payload)) {
/* Handle directly */
rtw_hal_c2h_handler(adapter, id, seq, plen, payload);
goto exit;
}
if (rtw_c2h_reg_wk_cmd(adapter, c2h_evt) != _SUCCESS)
RTW_ERR("%s rtw_c2h_reg_wk_cmd fail\n", __func__);
exit:
return;
}
#endif
#ifdef CONFIG_SDIO_CHK_HCI_RESUME
#ifndef SDIO_HCI_RESUME_PWR_RDY_TIMEOUT_MS
#define SDIO_HCI_RESUME_PWR_RDY_TIMEOUT_MS 200
#endif
#ifndef DBG_SDIO_CHK_HCI_RESUME
#define DBG_SDIO_CHK_HCI_RESUME 0
#endif
bool sdio_chk_hci_resume(struct intf_hdl *pintfhdl)
{
_adapter *adapter = pintfhdl->padapter;
u8 hci_sus_state;
u8 sus_ctl, sus_ctl_ori = 0xEA;
u8 do_leave = 0;
systime start = 0, end = 0;
u32 poll_cnt = 0;
u8 timeout = 0;
u8 sr = 0;
s32 err = 0;
rtw_hal_get_hwreg(adapter, HW_VAR_HCI_SUS_STATE, &hci_sus_state);
if (hci_sus_state == HCI_SUS_LEAVE || hci_sus_state == HCI_SUS_ERR)
goto no_hdl;
err = sd_cmd52_read(pintfhdl, SDIO_LOCAL_CMD_ADDR(SDIO_REG_HSUS_CTRL), 1, &sus_ctl);
if (err)
goto exit;
sus_ctl_ori = sus_ctl;
if ((sus_ctl & HCI_RESUME_PWR_RDY) && !(sus_ctl & HCI_SUS_CTRL))
goto exit;
if (sus_ctl & HCI_SUS_CTRL) {
sus_ctl &= ~(HCI_SUS_CTRL);
err = sd_cmd52_write(pintfhdl, SDIO_LOCAL_CMD_ADDR(SDIO_REG_HSUS_CTRL), 1, &sus_ctl);
if (err)
goto exit;
}
do_leave = 1;
/* polling for HCI_RESUME_PWR_RDY && !HCI_SUS_CTRL */
start = rtw_get_current_time();
while (1) {
if (rtw_is_surprise_removed(adapter)) {
sr = 1;
break;
}
err = sd_cmd52_read(pintfhdl, SDIO_LOCAL_CMD_ADDR(SDIO_REG_HSUS_CTRL), 1, &sus_ctl);
poll_cnt++;
if (!err && (sus_ctl & HCI_RESUME_PWR_RDY) && !(sus_ctl & HCI_SUS_CTRL))
break;
if (rtw_get_passing_time_ms(start) > SDIO_HCI_RESUME_PWR_RDY_TIMEOUT_MS) {
timeout = 1;
break;
}
}
end = rtw_get_current_time();
exit:
if (DBG_SDIO_CHK_HCI_RESUME) {
RTW_INFO(FUNC_ADPT_FMT" hci_sus_state:%u, sus_ctl:0x%02x(0x%02x), do_leave:%u, to:%u, err:%u\n"
, FUNC_ADPT_ARG(adapter), hci_sus_state, sus_ctl, sus_ctl_ori, do_leave, timeout, err);
if (start != 0 || end != 0) {
RTW_INFO(FUNC_ADPT_FMT" polling %d ms, cnt:%u\n"
, FUNC_ADPT_ARG(adapter), rtw_get_time_interval_ms(start, end), poll_cnt);
}
}
if (timeout) {
RTW_ERR(FUNC_ADPT_FMT" timeout(err:%d) sus_ctl:0x%02x\n"
, FUNC_ADPT_ARG(adapter), err, sus_ctl);
} else if (err) {
RTW_ERR(FUNC_ADPT_FMT" err:%d\n"
, FUNC_ADPT_ARG(adapter), err);
}
no_hdl:
return do_leave ? _TRUE : _FALSE;
}
void sdio_chk_hci_suspend(struct intf_hdl *pintfhdl)
{
#define SDIO_CHK_HCI_SUSPEND_POLLING 0
_adapter *adapter = pintfhdl->padapter;
u8 hci_sus_state;
u8 sus_ctl, sus_ctl_ori = 0xEA;
systime start = 0, end = 0;
u32 poll_cnt = 0;
u8 timeout = 0;
u8 sr = 0;
s32 err = 0;
u8 device_id;
u16 offset;
rtw_hal_get_hwreg(adapter, HW_VAR_HCI_SUS_STATE, &hci_sus_state);
if (hci_sus_state == HCI_SUS_LEAVE || hci_sus_state == HCI_SUS_LEAVING || hci_sus_state == HCI_SUS_ERR)
goto no_hdl;
err = sd_cmd52_read(pintfhdl, SDIO_LOCAL_CMD_ADDR(SDIO_REG_HSUS_CTRL), 1, &sus_ctl);
if (err)
goto exit;
sus_ctl_ori = sus_ctl;
if (!(sus_ctl & HCI_RESUME_PWR_RDY))
goto exit;
sus_ctl |= HCI_SUS_CTRL;
err = sd_cmd52_write(pintfhdl, SDIO_LOCAL_CMD_ADDR(SDIO_REG_HSUS_CTRL), 1, &sus_ctl);
if (err)
goto exit;
#if SDIO_CHK_HCI_SUSPEND_POLLING
/* polling for HCI_RESUME_PWR_RDY cleared */
start = rtw_get_current_time();
while (1) {
if (rtw_is_surprise_removed(adapter)) {
sr = 1;
break;
}
err = sd_cmd52_read(pintfhdl, SDIO_LOCAL_CMD_ADDR(SDIO_REG_HSUS_CTRL), 1, &sus_ctl);
poll_cnt++;
if (!err && !(sus_ctl & HCI_RESUME_PWR_RDY))
break;
if (rtw_get_passing_time_ms(start) > SDIO_HCI_RESUME_PWR_RDY_TIMEOUT_MS) {
timeout = 1;
break;
}
}
end = rtw_get_current_time();
#endif /* SDIO_CHK_HCI_SUSPEND_POLLING */
exit:
if (DBG_SDIO_CHK_HCI_RESUME) {
RTW_INFO(FUNC_ADPT_FMT" hci_sus_state:%u, sus_ctl:0x%02x(0x%02x), to:%u, err:%u\n"
, FUNC_ADPT_ARG(adapter), hci_sus_state, sus_ctl, sus_ctl_ori, timeout, err);
if (start != 0 || end != 0) {
RTW_INFO(FUNC_ADPT_FMT" polling %d ms, cnt:%u\n"
, FUNC_ADPT_ARG(adapter), rtw_get_time_interval_ms(start, end), poll_cnt);
}
}
#if SDIO_CHK_HCI_SUSPEND_POLLING
if (timeout) {
RTW_ERR(FUNC_ADPT_FMT" timeout(err:%d) sus_ctl:0x%02x\n"
, FUNC_ADPT_ARG(adapter), err, sus_ctl);
} else
#endif
if (err) {
RTW_ERR(FUNC_ADPT_FMT" err:%d\n"
, FUNC_ADPT_ARG(adapter), err);
}
no_hdl:
return;
}
#endif /* CONFIG_SDIO_CHK_HCI_RESUME */
#ifdef CONFIG_SDIO_INDIRECT_ACCESS
/* program indirect access register in sdio local to read/write page0 registers */
#ifndef INDIRECT_ACCESS_TIMEOUT_MS
#define INDIRECT_ACCESS_TIMEOUT_MS 200
#endif
#ifndef DBG_SDIO_INDIRECT_ACCESS
#define DBG_SDIO_INDIRECT_ACCESS 0
#endif
s32 sdio_iread(PADAPTER padapter, u32 addr, u8 size, u8 *v)
{
struct intf_hdl *pintfhdl = &padapter->iopriv.intf;
_mutex *mutex = &adapter_to_dvobj(padapter)->sd_indirect_access_mutex;
u8 val[4] = {0};
u8 cmd[4] = {0}; /* mapping to indirect access register, little endien */
systime start = 0, end = 0;
u8 timeout = 0;
u8 sr = 0;
s32 err = 0;
if (size == 1)
SET_INDIRECT_REG_SIZE_1BYTE(cmd);
else if (size == 2)
SET_INDIRECT_REG_SIZE_2BYTE(cmd);
else if (size == 4)
SET_INDIRECT_REG_SIZE_4BYTE(cmd);
SET_INDIRECT_REG_ADDR(cmd, addr);
/* acquire indirect access lock */
_enter_critical_mutex(mutex, NULL);
if (DBG_SDIO_INDIRECT_ACCESS)
RTW_INFO(FUNC_ADPT_FMT" cmd:%02x %02x %02x %02x\n", FUNC_ADPT_ARG(padapter), cmd[0], cmd[1], cmd[2], cmd[3]);
err = sd_cmd52_write(pintfhdl, SDIO_LOCAL_CMD_ADDR(SDIO_REG_INDIRECT_REG_CFG), 3, cmd);
if (err)
goto exit;
/* trigger */
SET_INDIRECT_REG_READ(cmd);
if (DBG_SDIO_INDIRECT_ACCESS)
RTW_INFO(FUNC_ADPT_FMT" cmd:%02x %02x %02x %02x\n", FUNC_ADPT_ARG(padapter), cmd[0], cmd[1], cmd[2], cmd[3]);
err = sd_cmd52_write(pintfhdl, SDIO_LOCAL_CMD_ADDR(SDIO_REG_INDIRECT_REG_CFG + 2), 1, cmd + 2);
if (err)
goto exit;
/* polling for indirect access done */
start = rtw_get_current_time();
while (1) {
if (rtw_is_surprise_removed(padapter)) {
sr = 1;
break;
}
err = sd_cmd52_read(pintfhdl, SDIO_LOCAL_CMD_ADDR(SDIO_REG_INDIRECT_REG_CFG + 2), 1, cmd + 2);
if (!err && GET_INDIRECT_REG_RDY(cmd))
break;
if (rtw_get_passing_time_ms(start) > INDIRECT_ACCESS_TIMEOUT_MS) {
timeout = 1;
break;
}
}
end = rtw_get_current_time();
if (timeout || sr)
goto exit;
/* read result */
err = sd_cmd52_read(pintfhdl, SDIO_LOCAL_CMD_ADDR(SDIO_REG_INDIRECT_REG_DATA), size, val);
if (size == 2)
*((u16 *)(val)) = le16_to_cpu(*((u16 *)(val)));
else if (size == 4)
*((u32 *)(val)) = le32_to_cpu(*((u32 *)(val)));
if (DBG_SDIO_INDIRECT_ACCESS) {
if (size == 1)
RTW_INFO(FUNC_ADPT_FMT" val:0x%02x\n", FUNC_ADPT_ARG(padapter), *((u8 *)(val)));
else if (size == 2)
RTW_INFO(FUNC_ADPT_FMT" val:0x%04x\n", FUNC_ADPT_ARG(padapter), *((u16 *)(val)));
else if (size == 4)
RTW_INFO(FUNC_ADPT_FMT" val:0x%08x\n", FUNC_ADPT_ARG(padapter), *((u32 *)(val)));
}
exit:
/* release indirect access lock */
_exit_critical_mutex(mutex, NULL);
if (DBG_SDIO_INDIRECT_ACCESS) {
RTW_INFO(FUNC_ADPT_FMT" addr:0x%0x size:%u, cmd:%02x %02x %02x %02x, to:%u, err:%u\n"
, FUNC_ADPT_ARG(padapter), addr, size, cmd[0], cmd[1], cmd[2], cmd[3], timeout, err);
if (start != 0 || end != 0) {
RTW_INFO(FUNC_ADPT_FMT" polling %d ms\n"
, FUNC_ADPT_ARG(padapter), rtw_get_time_interval_ms(start, end));
}
}
if (timeout) {
RTW_ERR(FUNC_ADPT_FMT" addr:0x%0x timeout(err:%d), cmd\n"
, FUNC_ADPT_ARG(padapter), addr, err);
if (!err)
err = -1; /* just for return value */
} else if (err) {
RTW_ERR(FUNC_ADPT_FMT" addr:0x%0x err:%d\n"
, FUNC_ADPT_ARG(padapter), addr, err);
} else if (sr) {
/* just for return value */
err = -1;
}
if (!err && !timeout && !sr)
_rtw_memcpy(v, val, size);
return err;
}
s32 sdio_iwrite(PADAPTER padapter, u32 addr, u8 size, u8 *v)
{
struct intf_hdl *pintfhdl = &padapter->iopriv.intf;
_mutex *mutex = &adapter_to_dvobj(padapter)->sd_indirect_access_mutex;
u8 val[4] = {0};
u8 cmd[4] = {0}; /* mapping to indirect access register, little endien */
systime start = 0, end = 0;
u8 timeout = 0;
u8 sr = 0;
s32 err = 0;
if (size == 1)
SET_INDIRECT_REG_SIZE_1BYTE(cmd);
else if (size == 2)
SET_INDIRECT_REG_SIZE_2BYTE(cmd);
else if (size == 4)
SET_INDIRECT_REG_SIZE_4BYTE(cmd);
SET_INDIRECT_REG_ADDR(cmd, addr);
/* acquire indirect access lock */
_enter_critical_mutex(mutex, NULL);
if (DBG_SDIO_INDIRECT_ACCESS)
RTW_INFO(FUNC_ADPT_FMT" cmd:%02x %02x %02x %02x\n", FUNC_ADPT_ARG(padapter), cmd[0], cmd[1], cmd[2], cmd[3]);
err = sd_cmd52_write(pintfhdl, SDIO_LOCAL_CMD_ADDR(SDIO_REG_INDIRECT_REG_CFG), 3, cmd);
if (err)
goto exit;
/* data to write */
_rtw_memcpy(val, v, size);
if (DBG_SDIO_INDIRECT_ACCESS) {
if (size == 1)
RTW_INFO(FUNC_ADPT_FMT" val:0x%02x\n", FUNC_ADPT_ARG(padapter), *((u8 *)(val)));
else if (size == 2)
RTW_INFO(FUNC_ADPT_FMT" val:0x%04x\n", FUNC_ADPT_ARG(padapter), *((u16 *)(val)));
else if (size == 4)
RTW_INFO(FUNC_ADPT_FMT" val:0x%08x\n", FUNC_ADPT_ARG(padapter), *((u32 *)(val)));
}
if (size == 2)
*((u16 *)(val)) = cpu_to_le16(*((u16 *)(val)));
else if (size == 4)
*((u32 *)(val)) = cpu_to_le32(*((u32 *)(val)));
err = sd_cmd52_write(pintfhdl, SDIO_LOCAL_CMD_ADDR(SDIO_REG_INDIRECT_REG_DATA), size, val);
if (err)
goto exit;
/* trigger */
SET_INDIRECT_REG_WRITE(cmd);
if (DBG_SDIO_INDIRECT_ACCESS)
RTW_INFO(FUNC_ADPT_FMT" cmd:%02x %02x %02x %02x\n", FUNC_ADPT_ARG(padapter), cmd[0], cmd[1], cmd[2], cmd[3]);
err = sd_cmd52_write(pintfhdl, SDIO_LOCAL_CMD_ADDR(SDIO_REG_INDIRECT_REG_CFG + 2), 1, cmd + 2);
if (err)
goto exit;
/* polling for indirect access done */
start = rtw_get_current_time();
while (1) {
if (rtw_is_surprise_removed(padapter)) {
sr = 1;
break;
}
err = sd_cmd52_read(pintfhdl, SDIO_LOCAL_CMD_ADDR(SDIO_REG_INDIRECT_REG_CFG + 2), 1, cmd + 2);
if (!err && GET_INDIRECT_REG_RDY(cmd))
break;
if (rtw_get_passing_time_ms(start) > INDIRECT_ACCESS_TIMEOUT_MS) {
timeout = 1;
break;
}
}
end = rtw_get_current_time();
if (timeout || sr)
goto exit;
exit:
/* release indirect access lock */
_exit_critical_mutex(mutex, NULL);
if (DBG_SDIO_INDIRECT_ACCESS) {
RTW_INFO(FUNC_ADPT_FMT" addr:0x%0x size:%u, cmd:%02x %02x %02x %02x, to:%u, err:%u\n"
, FUNC_ADPT_ARG(padapter), addr, size, cmd[0], cmd[1], cmd[2], cmd[3], timeout, err);
if (start != 0 || end != 0) {
RTW_INFO(FUNC_ADPT_FMT" polling %d ms\n"
, FUNC_ADPT_ARG(padapter), rtw_get_time_interval_ms(start, end));
}
}
if (timeout) {
RTW_ERR(FUNC_ADPT_FMT" addr:0x%0x timeout(err:%d), cmd\n"
, FUNC_ADPT_ARG(padapter), addr, err);
if (!err)
err = -1; /* just for return value */
} else if (err) {
RTW_ERR(FUNC_ADPT_FMT" addr:0x%0x err:%d\n"
, FUNC_ADPT_ARG(padapter), addr, err);
} else if (sr) {
/* just for return value */
err = -1;
}
return err;
}
u8 sdio_iread8(struct intf_hdl *pintfhdl, u32 addr)
{
u8 val;
if (sdio_iread(pintfhdl->padapter, addr, 1, (u8 *)&val) != 0)
val = SDIO_ERR_VAL8;
return val;
}
u16 sdio_iread16(struct intf_hdl *pintfhdl, u32 addr)
{
u16 val;
if (sdio_iread(pintfhdl->padapter, addr, 2, (u8 *)&val) != 0)
val = SDIO_ERR_VAL16;
return val;
}
u32 sdio_iread32(struct intf_hdl *pintfhdl, u32 addr)
{
u32 val;
if (sdio_iread(pintfhdl->padapter, addr, 4, (u8 *)&val) != 0)
val = SDIO_ERR_VAL32;
return val;
}
s32 sdio_iwrite8(struct intf_hdl *pintfhdl, u32 addr, u8 val)
{
return sdio_iwrite(pintfhdl->padapter, addr, 1, (u8 *)&val);
}
s32 sdio_iwrite16(struct intf_hdl *pintfhdl, u32 addr, u16 val)
{
return sdio_iwrite(pintfhdl->padapter, addr, 2, (u8 *)&val);
}
s32 sdio_iwrite32(struct intf_hdl *pintfhdl, u32 addr, u32 val)
{
return sdio_iwrite(pintfhdl->padapter, addr, 4, (u8 *)&val);
}
#endif /* CONFIG_SDIO_INDIRECT_ACCESS */
u32 cmd53_4byte_alignment(struct intf_hdl *pintfhdl, u32 addr)
{
u32 addr_rdr;
u32 value;
value = 0;
addr_rdr = addr % 4;
if (addr_rdr) {
u8 shift_bit;
shift_bit = addr_rdr * 8;
value = (sd_read32(pintfhdl, (addr - addr_rdr), NULL)) >> shift_bit;
} else
value = sd_read32(pintfhdl, addr, NULL);
return value;
}
#endif /* !RTW_HALMAC */

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/******************************************************************************
*
* Copyright(c) 2013 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#include <drv_types.h>
#include <hal_data.h> /* HAL_DATA_TYPE */
#ifdef CONFIG_SDIO_MULTI_FUNCTION_COEX
int rtw_sdio_multi_state = SDIO_MULTI_WIFI;
EXPORT_SYMBOL(rtw_sdio_multi_state);
bool ex_hal_sdio_multi_if_bus_available(PADAPTER adapter)
{
return rtw_sdio_multi_state == SDIO_MULTI_WIFI;
}
#endif /* CONFIG_SDIO_MULTI_FUNCTION_COEX */

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hal/hal_mcc.c Normal file
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hal/hal_mp.c Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#define _HAL_PHY_C_
#include <drv_types.h>
/**
* Function: PHY_CalculateBitShift
*
* OverView: Get shifted position of the BitMask
*
* Input:
* u32 BitMask,
*
* Output: none
* Return: u32 Return the shift bit bit position of the mask
*/
u32
PHY_CalculateBitShift(
u32 BitMask
)
{
u32 i;
for (i = 0; i <= 31; i++) {
if (((BitMask >> i) & 0x1) == 1)
break;
}
return i;
}
#ifdef CONFIG_RF_SHADOW_RW
/* ********************************************************************************
* Constant.
* ********************************************************************************
* 2008/11/20 MH For Debug only, RF */
static RF_SHADOW_T RF_Shadow[RF6052_MAX_PATH][RF6052_MAX_REG];
/*
* ==> RF shadow Operation API Code Section!!!
*
*-----------------------------------------------------------------------------
* Function: PHY_RFShadowRead
* PHY_RFShadowWrite
* PHY_RFShadowCompare
* PHY_RFShadowRecorver
* PHY_RFShadowCompareAll
* PHY_RFShadowRecorverAll
* PHY_RFShadowCompareFlagSet
* PHY_RFShadowRecorverFlagSet
*
* Overview: When we set RF register, we must write shadow at first.
* When we are running, we must compare shadow abd locate error addr.
* Decide to recorver or not.
*
* Input: NONE
*
* Output: NONE
*
* Return: NONE
*
* Revised History:
* When Who Remark
* 11/20/2008 MHC Create Version 0.
*
*---------------------------------------------------------------------------*/
u32
PHY_RFShadowRead(
PADAPTER Adapter,
enum rf_path eRFPath,
u32 Offset)
{
return RF_Shadow[eRFPath][Offset].Value;
} /* PHY_RFShadowRead */
void
PHY_RFShadowWrite(
PADAPTER Adapter,
enum rf_path eRFPath,
u32 Offset,
u32 Data)
{
RF_Shadow[eRFPath][Offset].Value = (Data & bRFRegOffsetMask);
RF_Shadow[eRFPath][Offset].Driver_Write = _TRUE;
} /* PHY_RFShadowWrite */
BOOLEAN
PHY_RFShadowCompare(
PADAPTER Adapter,
enum rf_path eRFPath,
u32 Offset)
{
u32 reg;
/* Check if we need to check the register */
if (RF_Shadow[eRFPath][Offset].Compare == _TRUE) {
reg = rtw_hal_read_rfreg(Adapter, eRFPath, Offset, bRFRegOffsetMask);
/* Compare shadow and real rf register for 20bits!! */
if (RF_Shadow[eRFPath][Offset].Value != reg) {
/* Locate error position. */
RF_Shadow[eRFPath][Offset].ErrorOrNot = _TRUE;
}
return RF_Shadow[eRFPath][Offset].ErrorOrNot ;
}
return _FALSE;
} /* PHY_RFShadowCompare */
void
PHY_RFShadowRecorver(
PADAPTER Adapter,
enum rf_path eRFPath,
u32 Offset)
{
/* Check if the address is error */
if (RF_Shadow[eRFPath][Offset].ErrorOrNot == _TRUE) {
/* Check if we need to recorver the register. */
if (RF_Shadow[eRFPath][Offset].Recorver == _TRUE) {
rtw_hal_write_rfreg(Adapter, eRFPath, Offset, bRFRegOffsetMask,
RF_Shadow[eRFPath][Offset].Value);
}
}
} /* PHY_RFShadowRecorver */
void
PHY_RFShadowCompareAll(
PADAPTER Adapter)
{
enum rf_path eRFPath = RF_PATH_A;
u32 Offset = 0, maxReg = GET_RF6052_REAL_MAX_REG(Adapter);
for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) {
for (Offset = 0; Offset < maxReg; Offset++)
PHY_RFShadowCompare(Adapter, eRFPath, Offset);
}
} /* PHY_RFShadowCompareAll */
void
PHY_RFShadowRecorverAll(
PADAPTER Adapter)
{
enum rf_path eRFPath = RF_PATH_A;
u32 Offset = 0, maxReg = GET_RF6052_REAL_MAX_REG(Adapter);
for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) {
for (Offset = 0; Offset < maxReg; Offset++)
PHY_RFShadowRecorver(Adapter, eRFPath, Offset);
}
} /* PHY_RFShadowRecorverAll */
void
PHY_RFShadowCompareFlagSet(
PADAPTER Adapter,
enum rf_path eRFPath,
u32 Offset,
u8 Type)
{
/* Set True or False!!! */
RF_Shadow[eRFPath][Offset].Compare = Type;
} /* PHY_RFShadowCompareFlagSet */
void
PHY_RFShadowRecorverFlagSet(
PADAPTER Adapter,
enum rf_path eRFPath,
u32 Offset,
u8 Type)
{
/* Set True or False!!! */
RF_Shadow[eRFPath][Offset].Recorver = Type;
} /* PHY_RFShadowRecorverFlagSet */
void
PHY_RFShadowCompareFlagSetAll(
PADAPTER Adapter)
{
enum rf_path eRFPath = RF_PATH_A;
u32 Offset = 0, maxReg = GET_RF6052_REAL_MAX_REG(Adapter);
for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) {
for (Offset = 0; Offset < maxReg; Offset++) {
/* 2008/11/20 MH For S3S4 test, we only check reg 26/27 now!!!! */
if (Offset != 0x26 && Offset != 0x27)
PHY_RFShadowCompareFlagSet(Adapter, eRFPath, Offset, _FALSE);
else
PHY_RFShadowCompareFlagSet(Adapter, eRFPath, Offset, _TRUE);
}
}
} /* PHY_RFShadowCompareFlagSetAll */
void
PHY_RFShadowRecorverFlagSetAll(
PADAPTER Adapter)
{
enum rf_path eRFPath = RF_PATH_A;
u32 Offset = 0, maxReg = GET_RF6052_REAL_MAX_REG(Adapter);
for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) {
for (Offset = 0; Offset < maxReg; Offset++) {
/* 2008/11/20 MH For S3S4 test, we only check reg 26/27 now!!!! */
if (Offset != 0x26 && Offset != 0x27)
PHY_RFShadowRecorverFlagSet(Adapter, eRFPath, Offset, _FALSE);
else
PHY_RFShadowRecorverFlagSet(Adapter, eRFPath, Offset, _TRUE);
}
}
} /* PHY_RFShadowCompareFlagSetAll */
void
PHY_RFShadowRefresh(
PADAPTER Adapter)
{
enum rf_path eRFPath = RF_PATH_A;
u32 Offset = 0, maxReg = GET_RF6052_REAL_MAX_REG(Adapter);
for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) {
for (Offset = 0; Offset < maxReg; Offset++) {
RF_Shadow[eRFPath][Offset].Value = 0;
RF_Shadow[eRFPath][Offset].Compare = _FALSE;
RF_Shadow[eRFPath][Offset].Recorver = _FALSE;
RF_Shadow[eRFPath][Offset].ErrorOrNot = _FALSE;
RF_Shadow[eRFPath][Offset].Driver_Write = _FALSE;
}
}
} /* PHY_RFShadowRead */
#endif /*CONFIG_RF_SHADOW_RW*/

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/******************************************************************************
*
* Copyright(c) 2015 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _HALMAC_2_PLATFORM_H_
#define _HALMAC_2_PLATFORM_H_
/*[Driver] always set BUILD_TEST =0*/
#define BUILD_TEST 0
#if BUILD_TEST
#include "../Platform/App/Test/halmac_2_platformapi.h"
#else
/*[Driver] use their own header files*/
#include <drv_conf.h> /* for basic_types.h and osdep_service.h */
#include <basic_types.h> /* u8, u16, u32 and etc.*/
#include <osdep_service.h> /* __BIG_ENDIAN, __LITTLE_ENDIAN, _sema, _mutex */
#endif
/*[Driver] provide the define of NULL, u8, u16, u32*/
#ifndef NULL
#define NULL ((void *)0)
#endif
#define HALMAC_INLINE inline
/*
* Ignore following typedef because Linux already have these
* u8, u16, u32, s8, s16, s32
* __le16, __le32, __be16, __be32
*/
#define HALMAC_PLATFORM_LITTLE_ENDIAN 1
#define HALMAC_PLATFORM_BIG_ENDIAN 0
/* Note : Named HALMAC_PLATFORM_LITTLE_ENDIAN / HALMAC_PLATFORM_BIG_ENDIAN
* is not mandatory. But Little endian must be '1'. Big endian must be '0'
*/
/*[Driver] config the system endian*/
#ifdef __LITTLE_ENDIAN
#define HALMAC_SYSTEM_ENDIAN HALMAC_PLATFORM_LITTLE_ENDIAN
#else /* !__LITTLE_ENDIAN */
#define HALMAC_SYSTEM_ENDIAN HALMAC_PLATFORM_BIG_ENDIAN
#endif /* !__LITTLE_ENDIAN */
/*[Driver] config if the operating platform*/
#define HALMAC_PLATFORM_WINDOWS 0
#define HALMAC_PLATFORM_LINUX 1
#define HALMAC_PLATFORM_AP 0
/*[Driver] must set HALMAC_PLATFORM_TESTPROGRAM = 0*/
#define HALMAC_PLATFORM_TESTPROGRAM 0
/*[Driver] config if enable the dbg msg or notl*/
#define HALMAC_DBG_MSG_ENABLE 1
#define HALMAC_MSG_LEVEL_TRACE 3
#define HALMAC_MSG_LEVEL_WARNING 2
#define HALMAC_MSG_LEVEL_ERR 1
#define HALMAC_MSG_LEVEL_NO_LOG 0
/*[Driver] config halmac msg level
* Use HALMAC_MSG_LEVEL_XXXX
*/
#define HALMAC_MSG_LEVEL HALMAC_MSG_LEVEL_TRACE
/*[Driver] define the Rx FIFO expanding mode packet size unit for 8821C and 8822B */
/*Should be 8 Byte alignment*/
#define HALMAC_RX_FIFO_EXPANDING_MODE_PKT_SIZE 80 /*Bytes*/
#define HALMAC_USE_TYPEDEF 0
/*[Driver] provide the type mutex*/
/* Mutex type */
typedef _mutex HALMAC_MUTEX;
#endif /* _HALMAC_2_PLATFORM_H_ */

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hal/halmac/halmac_88xx/halmac_8822c/halmac_8822c_cfg.h Normal file
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/******************************************************************************
*
* Copyright(c) 2017 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _HALMAC_8822C_CFG_H_
#define _HALMAC_8822C_CFG_H_
#include "../../halmac_hw_cfg.h"
#include "../halmac_88xx_cfg.h"
#if HALMAC_8822C_SUPPORT
#define TX_FIFO_SIZE_8822C 262144
#define RX_FIFO_SIZE_8822C 24576
#define TRX_SHARE_SIZE0_8822C 40960
#define TRX_SHARE_SIZE1_8822C 24576
#define TRX_SHARE_SIZE2_8822C (TRX_SHARE_SIZE0_8822C + TRX_SHARE_SIZE1_8822C)
#define TX_FIFO_SIZE_LA_8822C (TX_FIFO_SIZE_8822C >> 1)
#define TX_FIFO_SIZE_RX_EXPAND_1BLK_8822C \
(TX_FIFO_SIZE_8822C - TRX_SHARE_SIZE0_8822C)
#define RX_FIFO_SIZE_RX_EXPAND_1BLK_8822C \
(RX_FIFO_SIZE_8822C + TRX_SHARE_SIZE0_8822C)
#define TX_FIFO_SIZE_RX_EXPAND_2BLK_8822C \
(TX_FIFO_SIZE_8822C - TRX_SHARE_SIZE2_8822C)
#define RX_FIFO_SIZE_RX_EXPAND_2BLK_8822C \
(RX_FIFO_SIZE_8822C + TRX_SHARE_SIZE2_8822C)
#define TX_FIFO_SIZE_RX_EXPAND_3BLK_8822C \
(TX_FIFO_SIZE_8822C - TRX_SHARE_SIZE2_8822C - TRX_SHARE_SIZE0_8822C)
#define RX_FIFO_SIZE_RX_EXPAND_3BLK_8822C \
(RX_FIFO_SIZE_8822C + TRX_SHARE_SIZE2_8822C + TRX_SHARE_SIZE0_8822C)
#define TX_FIFO_SIZE_RX_EXPAND_4BLK_8822C \
(TX_FIFO_SIZE_8822C - (2 * TRX_SHARE_SIZE2_8822C))
#define RX_FIFO_SIZE_RX_EXPAND_4BLK_8822C \
(RX_FIFO_SIZE_8822C + (2 * TRX_SHARE_SIZE2_8822C))
#define EFUSE_SIZE_8822C 512
#define EEPROM_SIZE_8822C 768
#define BT_EFUSE_SIZE_8822C 128
#define PRTCT_EFUSE_SIZE_8822C 124
#define SEC_CAM_NUM_8822C 64
#define OQT_ENTRY_AC_8822C 32
#define OQT_ENTRY_NOAC_8822C 32
#define MACID_MAX_8822C 128
#define WLAN_FW_IRAM_MAX_SIZE_8822C 65536
#define WLAN_FW_DRAM_MAX_SIZE_8822C 65536
#define WLAN_FW_ERAM_MAX_SIZE_8822C 131072
#define WLAN_FW_MAX_SIZE_8822C (WLAN_FW_IRAM_MAX_SIZE_8822C + \
WLAN_FW_DRAM_MAX_SIZE_8822C + WLAN_FW_ERAM_MAX_SIZE_8822C)
#endif /* HALMAC_8822C_SUPPORT*/
#endif

222
hal/halmac/halmac_88xx/halmac_8822c/halmac_cfg_wmac_8822c.c Normal file
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/******************************************************************************
*
* Copyright(c) 2017 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#include "halmac_cfg_wmac_8822c.h"
#if HALMAC_8822C_SUPPORT
/**
* cfg_drv_info_8822c() - config driver info
* @adapter : the adapter of halmac
* @drv_info : driver information selection
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
cfg_drv_info_8822c(struct halmac_adapter *adapter,
enum halmac_drv_info drv_info)
{
u8 drv_info_size = 0;
u8 phy_status_en = 0;
u8 sniffer_en = 0;
u8 plcp_hdr_en = 0;
u32 value32;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
struct halmac_rx_ignore_info *info = &adapter->rx_ignore_info;
struct halmac_mac_rx_ignore_cfg cfg;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
PLTFM_MSG_TRACE("[TRACE]drv info = %d\n", drv_info);
switch (drv_info) {
case HALMAC_DRV_INFO_NONE:
drv_info_size = 0;
phy_status_en = 0;
sniffer_en = 0;
plcp_hdr_en = 0;
info->hdr_chk_mask = 1;
info->fcs_chk_mask = 1;
break;
case HALMAC_DRV_INFO_PHY_STATUS:
drv_info_size = 4;
phy_status_en = 1;
sniffer_en = 0;
plcp_hdr_en = 0;
info->hdr_chk_mask = 1;
info->fcs_chk_mask = 1;
break;
case HALMAC_DRV_INFO_PHY_SNIFFER:
drv_info_size = 5; /* phy status 4byte, sniffer info 1byte */
phy_status_en = 1;
sniffer_en = 1;
plcp_hdr_en = 0;
info->hdr_chk_mask = 0;
info->fcs_chk_mask = 0;
break;
case HALMAC_DRV_INFO_PHY_PLCP:
drv_info_size = 6; /* phy status 4byte, plcp header 2byte */
phy_status_en = 1;
sniffer_en = 0;
plcp_hdr_en = 1;
info->hdr_chk_mask = 0;
info->fcs_chk_mask = 0;
break;
default:
return HALMAC_RET_SW_CASE_NOT_SUPPORT;
}
cfg.hdr_chk_en = info->hdr_chk_en;
cfg.fcs_chk_en = info->fcs_chk_en;
cfg.cck_rst_en = info->cck_rst_en;
cfg.fcs_chk_thr = info->fcs_chk_thr;
api->halmac_set_hw_value(adapter, HALMAC_HW_RX_IGNORE, &cfg);
HALMAC_REG_W8(REG_RX_DRVINFO_SZ, drv_info_size);
adapter->drv_info_size = drv_info_size;
value32 = HALMAC_REG_R32(REG_RCR);
value32 = (value32 & (~BIT_APP_PHYSTS));
if (phy_status_en == 1)
value32 = value32 | BIT_APP_PHYSTS;
HALMAC_REG_W32(REG_RCR, value32);
value32 = HALMAC_REG_R32(REG_WMAC_OPTION_FUNCTION + 4);
value32 = (value32 & (~(BIT(8) | BIT(9))));
if (sniffer_en == 1)
value32 = value32 | BIT(9);
if (plcp_hdr_en == 1)
value32 = value32 | BIT(8);
HALMAC_REG_W32(REG_WMAC_OPTION_FUNCTION + 4, value32);
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* init_low_pwr_8822c() - config WMAC register
* @adapter
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
init_low_pwr_8822c(struct halmac_adapter *adapter)
{
u16 value16;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
/*RXGCK FIFO threshold CFG*/
value16 = (HALMAC_REG_R16(REG_RXPSF_CTRL + 2) & 0xF00F);
value16 |= BIT(10) | BIT(8) | BIT(6) | BIT(4);
HALMAC_REG_W16(REG_RXPSF_CTRL + 2, value16);
/*invalid_pkt CFG*/
value16 = 0;
value16 = BIT_SET_RXPSF_PKTLENTHR(value16, 1);
value16 |= BIT_RXPSF_CTRLEN | BIT_RXPSF_VHTCHKEN | BIT_RXPSF_HTCHKEN
| BIT_RXPSF_OFDMCHKEN | BIT_RXPSF_CCKCHKEN
| BIT_RXPSF_OFDMRST | BIT_RXPSF_CCKRST;
HALMAC_REG_W16(REG_RXPSF_CTRL, value16);
HALMAC_REG_W32(REG_RXPSF_TYPE_CTRL, 0xFFFFFFFF);
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
void
cfg_rxgck_fifo_8822c(struct halmac_adapter *adapter, u8 enable)
{
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
if (enable == 1) {
if (adapter->hw_cfg_info.trx_mode != HALMAC_TRNSFER_NORMAL)
PLTFM_MSG_ERR("[ERR]trx_mode != normal\n");
else
HALMAC_REG_W8_SET(REG_RXPSF_CTRL + 3, BIT(4));
} else {
HALMAC_REG_W8_CLR(REG_RXPSF_CTRL + 3, BIT(4));
}
}
void
cfg_rx_ignore_8822c(struct halmac_adapter *adapter,
struct halmac_mac_rx_ignore_cfg *cfg)
{
u16 value16;
struct halmac_rx_ignore_info *info = &adapter->rx_ignore_info;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
value16 = HALMAC_REG_R16(REG_RXPSF_CTRL);
info->hdr_chk_en = cfg->hdr_chk_en;
info->fcs_chk_en = cfg->fcs_chk_en;
info->cck_rst_en = cfg->cck_rst_en;
info->fcs_chk_thr = cfg->fcs_chk_thr;
/*mac header check enable*/
if (cfg->hdr_chk_en == 1 && info->hdr_chk_mask == 1)
value16 |= BIT_RXPSF_MHCHKEN;
else
value16 &= ~(BIT_RXPSF_MHCHKEN);
/*continuous FCS error counter enable*/
if (cfg->fcs_chk_en == 1 && info->fcs_chk_mask == 1)
value16 |= BIT_RXPSF_CONT_ERRCHKEN;
else
value16 &= ~(BIT_RXPSF_CONT_ERRCHKEN);
/*MAC Rx reset when CCK enable*/
if (cfg->cck_rst_en == 1)
value16 |= BIT_RXPSF_CCKRST;
else
value16 &= ~(BIT_RXPSF_CCKRST);
/*FCS error counter threshold*/
value16 = BIT_SET_RXPSF_ERRTHR(value16, cfg->fcs_chk_thr);
HALMAC_REG_W16(REG_RXPSF_CTRL, value16);
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
}
void
cfg_ampdu_8822c(struct halmac_adapter *adapter,
struct halmac_ampdu_config *cfg)
{
u32 ht_max_len;
u32 vht_max_len;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
HALMAC_REG_W8(REG_PROT_MODE_CTRL + 2, cfg->max_agg_num);
HALMAC_REG_W8(REG_PROT_MODE_CTRL + 3, cfg->max_agg_num);
if (cfg->max_len_en == 1) {
ht_max_len = cfg->ht_max_len & 0xFFFF;
vht_max_len = cfg->vht_max_len & 0xFFFFF;
HALMAC_REG_W32(REG_AMPDU_MAX_LENGTH_HT, ht_max_len);
HALMAC_REG_W32(REG_AMPDU_MAX_LENGTH_VHT, vht_max_len);
}
}
#endif /* HALMAC_8822C_SUPPORT */

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/******************************************************************************
*
* Copyright(c) 2017 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _HALMAC_CFG_WMAC_8822C_H_
#define _HALMAC_CFG_WMAC_8822C_H_
#include "../../halmac_api.h"
#if HALMAC_8822C_SUPPORT
enum halmac_ret_status
cfg_drv_info_8822c(struct halmac_adapter *adapter,
enum halmac_drv_info drv_info);
enum halmac_ret_status
init_low_pwr_8822c(struct halmac_adapter *adapter);
void
cfg_rxgck_fifo_8822c(struct halmac_adapter *adapter, u8 enable);
void
cfg_rx_ignore_8822c(struct halmac_adapter *adapter,
struct halmac_mac_rx_ignore_cfg *cfg);
void
cfg_ampdu_8822c(struct halmac_adapter *adapter,
struct halmac_ampdu_config *cfg);
#endif/* HALMAC_8822C_SUPPORT */
#endif/* _HALMAC_CFG_WMAC_8822C_H_ */

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/******************************************************************************
*
* Copyright(c) 2017 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#include "halmac_8822c_cfg.h"
#include "halmac_common_8822c.h"
#include "../halmac_common_88xx.h"
#if HALMAC_SDIO_SUPPORT
#include "halmac_sdio_8822c.h"
#endif
#include "halmac_cfg_wmac_8822c.h"
#if HALMAC_8822C_SUPPORT
static void
cfg_ldo25_8822c(struct halmac_adapter *adapter, u8 enable);
/**
* get_hw_value_8822c() -get hw config value
* @adapter : the adapter of halmac
* @hw_id : hw id for driver to query
* @value : hw value, reference table to get data type
* Author : KaiYuan Chang / Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
get_hw_value_8822c(struct halmac_adapter *adapter, enum halmac_hw_id hw_id,
void *value)
{
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
if (!value) {
PLTFM_MSG_ERR("[ERR]%s (NULL ==value)\n", __func__);
return HALMAC_RET_NULL_POINTER;
}
if (get_hw_value_88xx(adapter, hw_id, value) == HALMAC_RET_SUCCESS)
return HALMAC_RET_SUCCESS;
switch (hw_id) {
case HALMAC_HW_FW_MAX_SIZE:
*(u32 *)value = WLAN_FW_MAX_SIZE_8822C;
break;
#if HALMAC_SDIO_SUPPORT
case HALMAC_HW_SDIO_INT_LAT:
if (adapter->intf != HALMAC_INTERFACE_SDIO)
return HALMAC_RET_WRONG_INTF;
*(u32 *)value = get_sdio_int_lat_8822c(adapter);
break;
case HALMAC_HW_SDIO_CLK_CNT:
if (adapter->intf != HALMAC_INTERFACE_SDIO)
return HALMAC_RET_WRONG_INTF;
status = get_sdio_clk_cnt_8822c(adapter, (u32 *)value);
break;
#endif
default:
return HALMAC_RET_PARA_NOT_SUPPORT;
}
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return status;
}
/**
* set_hw_value_8822c() -set hw config value
* @adapter : the adapter of halmac
* @hw_id : hw id for driver to config
* @value : hw value, reference table to get data type
* Author : KaiYuan Chang / Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
set_hw_value_8822c(struct halmac_adapter *adapter, enum halmac_hw_id hw_id,
void *value)
{
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
if (!value) {
PLTFM_MSG_ERR("[ERR]null pointer\n");
return HALMAC_RET_NULL_POINTER;
}
if (set_hw_value_88xx(adapter, hw_id, value) == HALMAC_RET_SUCCESS)
return HALMAC_RET_SUCCESS;
switch (hw_id) {
case HALMAC_HW_AMPDU_CONFIG:
cfg_ampdu_8822c(adapter, (struct halmac_ampdu_config *)value);
break;
case HALMAC_HW_RXGCK_FIFO:
cfg_rxgck_fifo_8822c(adapter, *(u8 *)value);
break;
case HALMAC_HW_RX_IGNORE:
cfg_rx_ignore_8822c(adapter,
(struct halmac_mac_rx_ignore_cfg *)value);
break;
case HALMAC_HW_LDO25_EN:
cfg_ldo25_8822c(adapter, *(u8 *)value);
break;
case HALMAC_HW_PCIE_REF_AUTOK:
break;
#if HALMAC_SDIO_SUPPORT
case HALMAC_HW_SDIO_TX_FORMAT:
if (adapter->intf != HALMAC_INTERFACE_SDIO)
return HALMAC_RET_WRONG_INTF;
status =
cfg_tx_fmt_sdio_8822c(adapter,
*(enum halmac_sdio_tx_format *)value);
break;
case HALMAC_HW_SDIO_WT_EN:
if (adapter->intf != HALMAC_INTERFACE_SDIO)
return HALMAC_RET_WRONG_INTF;
status = set_sdio_wt_en_8822c(adapter, 1);
break;
case HALMAC_HW_SDIO_CLK_MONITOR:
if (adapter->intf != HALMAC_INTERFACE_SDIO)
return HALMAC_RET_WRONG_INTF;
status =
set_sdio_clk_mon_8822c(adapter,
*(enum halmac_sdio_clk_monitor *)value);
break;
#endif
default:
return HALMAC_RET_PARA_NOT_SUPPORT;
}
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return status;
}
/**
* halmac_fill_txdesc_check_sum_88xx() - fill in tx desc check sum
* @adapter : the adapter of halmac
* @txdesc : tx desc packet
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
fill_txdesc_check_sum_8822c(struct halmac_adapter *adapter, u8 *txdesc)
{
__le16 chksum = 0;
u16 txdesc_size;
__le16 *data;
u32 i;
if (!txdesc) {
PLTFM_MSG_ERR("[ERR]null pointer\n");
return HALMAC_RET_NULL_POINTER;
}
if (adapter->tx_desc_checksum != 1)
PLTFM_MSG_TRACE("[TRACE]chksum disable\n");
SET_TX_DESC_TXDESC_CHECKSUM(txdesc, 0x0000);
data = (u16 *)(txdesc);
/*unit: 4 Bytes*/
txdesc_size = (u16)((GET_TX_DESC_PKT_OFFSET(txdesc) +
(TX_DESC_SIZE_88XX >> 3)) << 1);
for (i = 0; i < txdesc_size; i++)
chksum ^= (*(data + 2 * i) ^ *(data + (2 * i + 1)));
/* *(data + 2 * i) & *(data + (2 * i + 1) have endain issue*/
/* Process eniadn issue after checksum calculation */
SET_TX_DESC_TXDESC_CHECKSUM(txdesc, rtk_le16_to_cpu(chksum));
return HALMAC_RET_SUCCESS;
}
static void
cfg_ldo25_8822c(struct halmac_adapter *adapter, u8 enable)
{
u8 value8;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
value8 = HALMAC_REG_R8(REG_ANAPARLDO_POW_MAC);
if (enable == 1)
HALMAC_REG_W8(REG_ANAPARLDO_POW_MAC, (u8)(value8 | BIT(0)));
else
HALMAC_REG_W8(REG_ANAPARLDO_POW_MAC, (u8)(value8 & ~BIT(0)));
}
#endif /* HALMAC_8822C_SUPPORT */

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/******************************************************************************
*
* Copyright(c) 2017 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _HALMAC_COMMON_8822C_H_
#define _HALMAC_COMMON_8822C_H_
#include "../../halmac_api.h"
#if HALMAC_8822C_SUPPORT
enum halmac_ret_status
get_hw_value_8822c(struct halmac_adapter *adapter, enum halmac_hw_id hw_id,
void *value);
enum halmac_ret_status
set_hw_value_8822c(struct halmac_adapter *adapter, enum halmac_hw_id hw_id,
void *value);
enum halmac_ret_status
fill_txdesc_check_sum_8822c(struct halmac_adapter *adapter, u8 *txdesc);
#endif/* HALMAC_8822C_SUPPORT */
#endif/* _HALMAC_COMMON_8822C_H_ */

1083
hal/halmac/halmac_88xx/halmac_8822c/halmac_gpio_8822c.c Normal file
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38
hal/halmac/halmac_88xx/halmac_8822c/halmac_gpio_8822c.h Normal file
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/******************************************************************************
*
* Copyright(c) 2017 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _HALMAC_GPIO_8822C_H_
#define _HALMAC_GPIO_8822C_H_
#include "../../halmac_api.h"
#include "../../halmac_gpio_cmd.h"
#if HALMAC_8822C_SUPPORT
enum halmac_ret_status
pinmux_get_func_8822c(struct halmac_adapter *adapter,
enum halmac_gpio_func gpio_func, u8 *enable);
enum halmac_ret_status
pinmux_set_func_8822c(struct halmac_adapter *adapter,
enum halmac_gpio_func gpio_func);
enum halmac_ret_status
pinmux_free_func_8822c(struct halmac_adapter *adapter,
enum halmac_gpio_func gpio_func);
#endif /* HALMAC_8822C_SUPPORT */
#endif/* _HALMAC_GPIO_8822C_H_ */

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hal/halmac/halmac_88xx/halmac_8822c/halmac_init_8822c.c Normal file
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hal/halmac/halmac_88xx/halmac_8822c/halmac_init_8822c.h Normal file
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/******************************************************************************
*
* Copyright(c) 2017 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _HALMAC_INIT_8822C_H_
#define _HALMAC_INIT_8822C_H_
#include "../../halmac_api.h"
#if HALMAC_8822C_SUPPORT
enum halmac_ret_status
mount_api_8822c(struct halmac_adapter *adapter);
enum halmac_ret_status
init_trx_cfg_8822c(struct halmac_adapter *adapter, enum halmac_trx_mode mode);
enum halmac_ret_status
init_system_cfg_8822c(struct halmac_adapter *adapter);
enum halmac_ret_status
init_protocol_cfg_8822c(struct halmac_adapter *adapter);
enum halmac_ret_status
init_h2c_8822c(struct halmac_adapter *adapter);
enum halmac_ret_status
init_edca_cfg_8822c(struct halmac_adapter *adapter);
enum halmac_ret_status
init_wmac_cfg_8822c(struct halmac_adapter *adapter);
enum halmac_ret_status
pre_init_system_cfg_8822c(struct halmac_adapter *adapter);
#endif /* HALMAC_8822C_SUPPORT */
#endif/* _HALMAC_INIT_8822C_H_ */

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hal/halmac/halmac_88xx/halmac_8822c/halmac_phy_8822c.c Normal file
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/******************************************************************************
*
* Copyright(c) 2017 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#include "../../halmac_type.h"
#if HALMAC_USB_SUPPORT
#include "halmac_usb_8822c.h"
#endif
#if HALMAC_PCIE_SUPPORT
#include "halmac_pcie_8822c.h"
#endif
/**
* ============ip sel item list============
* HALMAC_IP_INTF_PHY
* USB2 : usb2 phy, 1byte value
* USB3 : usb3 phy, 2byte value
* PCIE1 : pcie gen1 mdio, 2byte value
* PCIE2 : pcie gen2 mdio, 2byte value
* HALMAC_IP_SEL_MAC
* USB2, USB3, PCIE1, PCIE2 : mac ip, 1byte value
* HALMAC_IP_PCIE_DBI
* USB2 USB3 : none
* PCIE1, PCIE2 : pcie dbi, 1byte value
*/
#if HALMAC_8822C_SUPPORT
struct halmac_intf_phy_para usb2_phy_param_8822c[] = {
/* {offset, value, ip sel, cut mask, platform mask} */
{0xFFFF, 0x00,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_ALL,
HALMAC_INTF_PHY_PLATFORM_ALL},
};
struct halmac_intf_phy_para usb3_phy_param_8822c[] = {
/* {offset, value, ip sel, cut mask, platform mask} */
{0xFFFF, 0x0000,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_ALL,
HALMAC_INTF_PHY_PLATFORM_ALL},
};
struct halmac_intf_phy_para pcie_gen1_phy_param_8822c[] = {
/* {offset, value, ip sel, cut mask, platform mask} */
{0xFFFF, 0x0000,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_ALL,
HALMAC_INTF_PHY_PLATFORM_ALL},
};
struct halmac_intf_phy_para pcie_gen2_phy_param_8822c[] = {
/* {offset, value, ip sel, cut mask, platform mask} */
{0xFFFF, 0x0000,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_ALL,
HALMAC_INTF_PHY_PLATFORM_ALL},
};
#endif /* HALMAC_8822C_SUPPORT*/

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hal/halmac/halmac_88xx/halmac_8822c/halmac_pwr_seq_8822c.c Executable file
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/******************************************************************************
*
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#include "halmac_pwr_seq_8822c.h"
#if HALMAC_8822C_SUPPORT
static struct halmac_wlan_pwr_cfg TRANS_CARDDIS_TO_CARDEMU_8822C[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0x0086,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_SDIO,
HALMAC_PWR_CMD_WRITE, BIT(0), 0},
{0x0086,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_SDIO,
HALMAC_PWR_CMD_POLLING, BIT(1), BIT(1)},
{0x002E,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(2), BIT(2)},
{0x002D,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), 0},
{0x007F,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(7), 0},
{0x004A,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), 0},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(3) | BIT(4), 0},
{0xFFFF,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
0,
HALMAC_PWR_CMD_END, 0, 0},
};
static struct halmac_wlan_pwr_cfg TRANS_CARDEMU_TO_ACT_8822C[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0x0000,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK | HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(5), 0},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, (BIT(4) | BIT(3) | BIT(2)), 0},
{0x0075,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0)},
{0x0006,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_POLLING, BIT(1), BIT(1)},
{0x0075,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), 0},
{0xFF1A,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0},
{0x002E,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(3), 0},
{0x0006,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0)},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, (BIT(4) | BIT(3)), 0},
{0x1018,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(2), BIT(2)},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0)},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_POLLING, BIT(0), 0},
{0x0074,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(5), BIT(5)},
{0x0071,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(4), 0},
{0x0062,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, (BIT(7) | BIT(6) | BIT(5)),
(BIT(7) | BIT(6) | BIT(5))},
{0x0061,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, (BIT(7) | BIT(6) | BIT(5)), 0},
{0x001F,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, (BIT(7) | BIT(6)), BIT(7)},
{0x00EF,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, (BIT(7) | BIT(6)), BIT(7)},
{0x1045,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(4), BIT(4)},
{0x0010,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(2), BIT(2)},
{0xFFFF,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
0,
HALMAC_PWR_CMD_END, 0, 0},
};
static struct halmac_wlan_pwr_cfg TRANS_ACT_TO_CARDEMU_8822C[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0x0093,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(3), 0},
{0x001F,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0},
{0x00EF,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0},
{0x1045,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(4), 0},
{0xFF1A,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x30},
{0x0049,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(1), 0},
{0x0006,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0)},
{0x0002,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(1), 0},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(1), BIT(1)},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_POLLING, BIT(1), 0},
{0x0000,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK | HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(5), BIT(5)},
{0xFFFF,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
0,
HALMAC_PWR_CMD_END, 0, 0},
};
static struct halmac_wlan_pwr_cfg TRANS_CARDEMU_TO_CARDDIS_8822C[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0x0007,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK | HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x00},
{0x0067,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(5), 0},
{0x004A,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), 0},
{0x0081,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(7) | BIT(6), 0},
{0x0090,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(1), 0},
{0x0092,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x20},
{0x0093,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x04},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK | HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(3) | BIT(4), BIT(3)},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(2), BIT(2)},
{0x0086,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_SDIO,
HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0)},
{0xFFFF,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
0,
HALMAC_PWR_CMD_END, 0, 0},
};
/* Card Enable Array */
struct halmac_wlan_pwr_cfg *card_en_flow_8822c[] = {
TRANS_CARDDIS_TO_CARDEMU_8822C,
TRANS_CARDEMU_TO_ACT_8822C,
NULL
};
/* Card Disable Array */
struct halmac_wlan_pwr_cfg *card_dis_flow_8822c[] = {
TRANS_ACT_TO_CARDEMU_8822C,
TRANS_CARDEMU_TO_CARDDIS_8822C,
NULL
};
#if HALMAC_PLATFORM_TESTPROGRAM
static struct halmac_wlan_pwr_cfg TRANS_CARDEMU_TO_SUS_8822C[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(4) | BIT(3), (BIT(4) | BIT(3))},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK | HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(3) | BIT(4), BIT(3)},
{0x0007,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x20},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(3) | BIT(4), BIT(3) | BIT(4)},
{0x0086,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_SDIO,
HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0)},
{0x0086,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_SDIO,
HALMAC_PWR_CMD_POLLING, BIT(1), 0},
{0xFFFF,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
0,
HALMAC_PWR_CMD_END, 0, 0},
};
static struct halmac_wlan_pwr_cfg TRANS_SUS_TO_CARDEMU_8822C[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(3) | BIT(7), 0},
{0x0086,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_SDIO,
HALMAC_PWR_CMD_WRITE, BIT(0), 0},
{0x0086,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_SDIO,
HALMAC_PWR_CMD_POLLING, BIT(1), BIT(1)},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(3) | BIT(4), 0},
{0xFFFF,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
0,
HALMAC_PWR_CMD_END, 0, 0},
};
static struct halmac_wlan_pwr_cfg TRANS_CARDEMU_TO_PDN_8822C[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0x0007,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK | HALMAC_PWR_INTF_USB_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x20},
{0x0006,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), 0},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(7), BIT(7)},
{0xFFFF,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
0,
HALMAC_PWR_CMD_END, 0, 0},
};
static struct halmac_wlan_pwr_cfg TRANS_PDN_TO_CARDEMU_8822C[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(7), 0},
{0xFFFF,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
0,
HALMAC_PWR_CMD_END, 0, 0},
};
static struct halmac_wlan_pwr_cfg TRANS_ACT_TO_LPS_8822C[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0x0101,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(2), BIT(2)},
{0x0199,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(3), BIT(3)},
{0x019B,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(7), BIT(7)},
{0x1138,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0) | BIT(1), BIT(0) | BIT(1)},
{0x0194,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0)},
{0x0093,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x06},
{0x0092,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x68},
{0x0093,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x02},
{0x0092,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x68},
{0x0093,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x03},
{0x0092,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x68},
{0x0090,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(1), BIT(1)},
{0x0301,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0x7F, 0xFF},
{0x0522,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0xFF},
{0x05F8,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_POLLING, 0xFF, 0},
{0x05F9,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_POLLING, 0xFF, 0},
{0x05FA,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_POLLING, 0xFF, 0},
{0x05FB,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_POLLING, 0xFF, 0},
{0x0002,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), 0},
{0x0002,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_DELAY, 0, HALMAC_PWR_DELAY_US},
{0x0100,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x3F},
{0x0008,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(4), BIT(4)},
{0x0109,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_POLLING, BIT(7), BIT(7)},
{0x0090,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0)},
{0xFFFF,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
0,
HALMAC_PWR_CMD_END, 0, 0},
};
static struct halmac_wlan_pwr_cfg TRANS_ACT_TO_DEEP_LPS_8822C[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0x0101,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(2), BIT(2)},
{0x0199,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(3), BIT(3)},
{0x019B,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(7), BIT(7)},
{0x1138,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0) | BIT(1), BIT(0) | BIT(1)},
{0x0194,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0)},
{0x0093,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x04},
{0x0092,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x28},
{0x0093,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x00},
{0x0092,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x28},
{0x0093,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x01},
{0x0092,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x28},
{0x0090,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(1), BIT(1)},
{0x0301,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0x7F, 0xFF},
{0x0522,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0xFF},
{0x05F8,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_POLLING, 0xFF, 0},
{0x05F9,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_POLLING, 0xFF, 0},
{0x05FA,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_POLLING, 0xFF, 0},
{0x05FB,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_POLLING, 0xFF, 0},
{0x0002,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), 0},
{0x0002,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_DELAY, 0, HALMAC_PWR_DELAY_US},
{0x0100,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x3F},
{0x0008,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(4), BIT(4)},
{0x0109,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_POLLING, BIT(7), BIT(7)},
{0x0090,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0)},
{0xFFFF,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
0,
HALMAC_PWR_CMD_END, 0, 0},
};
static struct halmac_wlan_pwr_cfg TRANS_LPS_TO_ACT_8822C[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0x0080,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_SDIO,
HALMAC_PWR_CMD_WRITE, BIT(7), BIT(7)},
{0x0002,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_DELAY, 0, HALMAC_PWR_DELAY_MS},
{0x0080,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_SDIO,
HALMAC_PWR_CMD_WRITE, BIT(7), 0},
{0xFE58,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x84},
{0x03D9,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(7), BIT(7)},
{0x0002,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_DELAY, 0, HALMAC_PWR_DELAY_MS},
{0x03D9,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(7), 0},
{0x0002,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_DELAY, 0, HALMAC_PWR_DELAY_MS},
{0x0008,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(4), 0},
{0x0109,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_POLLING, BIT(7), 0},
{0x0100,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0xFF },
{0x0002,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(1) | BIT(0), BIT(1) | BIT(0)},
{0x0522,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0},
{0x113C,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x03},
{0x0124,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0xFF},
{0x0125,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0xFF},
{0x0126,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0xFF},
{0x0127,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0xFF},
{0x0090,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(1), 0},
{0x0101,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(2), 0},
{0x0301,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0x7F, 0x00},
{0xFFFF,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
0,
HALMAC_PWR_CMD_END, 0, 0},
};
/* Suspend Array */
struct halmac_wlan_pwr_cfg *suspend_flow_8822c[] = {
TRANS_ACT_TO_CARDEMU_8822C,
TRANS_CARDEMU_TO_SUS_8822C,
NULL
};
/* Resume Array */
struct halmac_wlan_pwr_cfg *resume_flow_8822c[] = {
TRANS_SUS_TO_CARDEMU_8822C,
TRANS_CARDEMU_TO_ACT_8822C,
NULL
};
/* HWPDN Array - HW behavior */
struct halmac_wlan_pwr_cfg *hwpdn_flow_8822c[] = {
NULL
};
/* Enter LPS - FW behavior */
struct halmac_wlan_pwr_cfg *enter_lps_flow_8822c[] = {
TRANS_ACT_TO_LPS_8822C,
NULL
};
/* Enter Deep LPS - FW behavior */
struct halmac_wlan_pwr_cfg *enter_dlps_flow_8822c[] = {
TRANS_ACT_TO_DEEP_LPS_8822C,
NULL
};
/* Leave LPS -FW behavior */
struct halmac_wlan_pwr_cfg *leave_lps_flow_8822c[] = {
TRANS_LPS_TO_ACT_8822C,
NULL
};
#endif
#endif /* HALMAC_8822C_SUPPORT */

40
hal/halmac/halmac_88xx/halmac_8822c/halmac_pwr_seq_8822c.h Executable file
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/******************************************************************************
*
* Copyright(c) 2017 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef HALMAC_POWER_SEQUENCE_8822C
#define HALMAC_POWER_SEQUENCE_8822C
#include "../../halmac_pwr_seq_cmd.h"
#include "../../halmac_hw_cfg.h"
#if HALMAC_8822C_SUPPORT
#define HALMAC_8822C_PWR_SEQ_VER "V15"
extern struct halmac_wlan_pwr_cfg *card_en_flow_8822c[];
extern struct halmac_wlan_pwr_cfg *card_dis_flow_8822c[];
#if HALMAC_PLATFORM_TESTPROGRAM
extern struct halmac_wlan_pwr_cfg *suspend_flow_8822c[];
extern struct halmac_wlan_pwr_cfg *resume_flow_8822c[];
extern struct halmac_wlan_pwr_cfg *hwpdn_flow_8822c[];
extern struct halmac_wlan_pwr_cfg *enter_lps_flow_8822c[];
extern struct halmac_wlan_pwr_cfg *enter_dlps_flow_8822c[];
extern struct halmac_wlan_pwr_cfg *leave_lps_flow_8822c[];
#endif
#endif /* HALMAC_8822C_SUPPORT*/
#endif

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hal/halmac/halmac_88xx/halmac_8822c/halmac_sdio_8822c.c Normal file
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82
hal/halmac/halmac_88xx/halmac_8822c/halmac_sdio_8822c.h Normal file
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/******************************************************************************
*
* Copyright(c) 2017 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _HALMAC_API_8822C_SDIO_H_
#define _HALMAC_API_8822C_SDIO_H_
#include "../../halmac_api.h"
#if (HALMAC_8822C_SUPPORT && HALMAC_SDIO_SUPPORT)
enum halmac_ret_status
mac_pwr_switch_sdio_8822c(struct halmac_adapter *adapter,
enum halmac_mac_power pwr);
enum halmac_ret_status
tx_allowed_sdio_8822c(struct halmac_adapter *adapter, u8 *buf, u32 size);
u8
reg_r8_sdio_8822c(struct halmac_adapter *adapter, u32 offset);
enum halmac_ret_status
reg_w8_sdio_8822c(struct halmac_adapter *adapter, u32 offset, u8 value);
u16
reg_r16_sdio_8822c(struct halmac_adapter *adapter, u32 offset);
enum halmac_ret_status
reg_w16_sdio_8822c(struct halmac_adapter *adapter, u32 offset, u16 value);
u32
reg_r32_sdio_8822c(struct halmac_adapter *adapter, u32 offset);
enum halmac_ret_status
reg_w32_sdio_8822c(struct halmac_adapter *adapter, u32 offset, u32 value);
enum halmac_ret_status
cfg_tx_fmt_sdio_8822c(struct halmac_adapter *adapter,
enum halmac_sdio_tx_format fmt);
enum halmac_ret_status
phy_cfg_sdio_8822c(struct halmac_adapter *adapter,
enum halmac_intf_phy_platform pltfm);
enum halmac_ret_status
pcie_switch_sdio_8822c(struct halmac_adapter *adapter,
enum halmac_pcie_cfg cfg);
enum halmac_ret_status
intf_tun_sdio_8822c(struct halmac_adapter *adapter);
enum halmac_ret_status
get_sdio_tx_addr_8822c(struct halmac_adapter *adapter, u8 *buf, u32 size,
u32 *cmd53_addr);
u32
get_sdio_int_lat_8822c(struct halmac_adapter *adapter);
enum halmac_ret_status
get_sdio_clk_cnt_8822c(struct halmac_adapter *adapter, u32 *cnt);
enum halmac_ret_status
set_sdio_wt_en_8822c(struct halmac_adapter *adapter, u8 enable);
enum halmac_ret_status
set_sdio_clk_mon_8822c(struct halmac_adapter *adapter,
enum halmac_sdio_clk_monitor monitor);
#endif /* HALMAC_8822C_SUPPORT*/
#endif/* _HALMAC_API_8822C_SDIO_H_ */

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hal/halmac/halmac_88xx/halmac_88xx_cfg.h Normal file
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/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _HALMAC_88XX_CFG_H_
#define _HALMAC_88XX_CFG_H_
#include "../halmac_api.h"
#if HALMAC_88XX_SUPPORT
#define TX_PAGE_SIZE_88XX 128
#define TX_PAGE_SIZE_SHIFT_88XX 7 /* 128 = 2^7 */
#define TX_ALIGN_SIZE_88XX 8
#define SDIO_TX_MAX_SIZE_88XX 31744
#define RX_BUF_FW_88XX 12288
#define TX_DESC_SIZE_88XX 48
#define RX_DESC_SIZE_88XX 24
#define H2C_PKT_SIZE_88XX 32 /* Only support 32 byte packet now */
#define H2C_PKT_HDR_SIZE_88XX 8
#define C2H_DATA_OFFSET_88XX 10
#define C2H_PKT_BUF_88XX 256
/* HW memory address */
#define OCPBASE_TXBUF_88XX 0x18780000
#define OCPBASE_DMEM_88XX 0x00200000
#define OCPBASE_EMEM_88XX 0x00100000
#endif /* HALMAC_88XX_SUPPORT */
#endif

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hal/halmac/halmac_88xx/halmac_bb_rf_88xx.c Normal file
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/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#include "halmac_bb_rf_88xx.h"
#include "halmac_88xx_cfg.h"
#include "halmac_common_88xx.h"
#include "halmac_init_88xx.h"
#if HALMAC_88XX_SUPPORT
/**
* start_iqk_88xx() -trigger FW IQK
* @adapter : the adapter of halmac
* @param : IQK parameter
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
start_iqk_88xx(struct halmac_adapter *adapter, struct halmac_iqk_para *param)
{
u8 h2c_buf[H2C_PKT_SIZE_88XX] = { 0 };
u16 seq_num = 0;
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
struct halmac_h2c_header_info hdr_info;
enum halmac_cmd_process_status *proc_status;
proc_status = &adapter->halmac_state.iqk_state.proc_status;
if (halmac_fw_validate(adapter) != HALMAC_RET_SUCCESS)
return HALMAC_RET_NO_DLFW;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
if (*proc_status == HALMAC_CMD_PROCESS_SENDING) {
PLTFM_MSG_TRACE("[TRACE]Wait event(iqk)\n");
return HALMAC_RET_BUSY_STATE;
}
*proc_status = HALMAC_CMD_PROCESS_SENDING;
IQK_SET_CLEAR(h2c_buf, param->clear);
IQK_SET_SEGMENT_IQK(h2c_buf, param->segment_iqk);
hdr_info.sub_cmd_id = SUB_CMD_ID_IQK;
hdr_info.content_size = 1;
hdr_info.ack = 1;
set_h2c_pkt_hdr_88xx(adapter, h2c_buf, &hdr_info, &seq_num);
adapter->halmac_state.iqk_state.seq_num = seq_num;
status = send_h2c_pkt_88xx(adapter, h2c_buf);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]send h2c pkt fail!!\n");
reset_ofld_feature_88xx(adapter, HALMAC_FEATURE_IQK);
return status;
}
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* ctrl_pwr_tracking_88xx() -trigger FW power tracking
* @adapter : the adapter of halmac
* @opt : power tracking option
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
ctrl_pwr_tracking_88xx(struct halmac_adapter *adapter,
struct halmac_pwr_tracking_option *opt)
{
u8 h2c_buf[H2C_PKT_SIZE_88XX] = { 0 };
u16 seq_num = 0;
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
struct halmac_h2c_header_info hdr_info;
struct halmac_pwr_tracking_para *param;
enum halmac_cmd_process_status *proc_status;
proc_status = &adapter->halmac_state.pwr_trk_state.proc_status;
if (halmac_fw_validate(adapter) != HALMAC_RET_SUCCESS)
return HALMAC_RET_NO_DLFW;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
if (*proc_status == HALMAC_CMD_PROCESS_SENDING) {
PLTFM_MSG_TRACE("[TRACE]Wait event(pwr tracking)...\n");
return HALMAC_RET_BUSY_STATE;
}
*proc_status = HALMAC_CMD_PROCESS_SENDING;
PWR_TRK_SET_TYPE(h2c_buf, opt->type);
PWR_TRK_SET_BBSWING_INDEX(h2c_buf, opt->bbswing_index);
param = &opt->pwr_tracking_para[HALMAC_RF_PATH_A];
PWR_TRK_SET_ENABLE_A(h2c_buf, param->enable);
PWR_TRK_SET_TX_PWR_INDEX_A(h2c_buf, param->tx_pwr_index);
PWR_TRK_SET_TSSI_VALUE_A(h2c_buf, param->tssi_value);
PWR_TRK_SET_OFFSET_VALUE_A(h2c_buf, param->pwr_tracking_offset_value);
param = &opt->pwr_tracking_para[HALMAC_RF_PATH_B];
PWR_TRK_SET_ENABLE_B(h2c_buf, param->enable);
PWR_TRK_SET_TX_PWR_INDEX_B(h2c_buf, param->tx_pwr_index);
PWR_TRK_SET_TSSI_VALUE_B(h2c_buf, param->tssi_value);
PWR_TRK_SET_OFFSET_VALUE_B(h2c_buf, param->pwr_tracking_offset_value);
param = &opt->pwr_tracking_para[HALMAC_RF_PATH_C];
PWR_TRK_SET_ENABLE_C(h2c_buf, param->enable);
PWR_TRK_SET_TX_PWR_INDEX_C(h2c_buf, param->tx_pwr_index);
PWR_TRK_SET_TSSI_VALUE_C(h2c_buf, param->tssi_value);
PWR_TRK_SET_OFFSET_VALUE_C(h2c_buf, param->pwr_tracking_offset_value);
param = &opt->pwr_tracking_para[HALMAC_RF_PATH_D];
PWR_TRK_SET_ENABLE_D(h2c_buf, param->enable);
PWR_TRK_SET_TX_PWR_INDEX_D(h2c_buf, param->tx_pwr_index);
PWR_TRK_SET_TSSI_VALUE_D(h2c_buf, param->tssi_value);
PWR_TRK_SET_OFFSET_VALUE_D(h2c_buf, param->pwr_tracking_offset_value);
hdr_info.sub_cmd_id = SUB_CMD_ID_PWR_TRK;
hdr_info.content_size = 20;
hdr_info.ack = 1;
set_h2c_pkt_hdr_88xx(adapter, h2c_buf, &hdr_info, &seq_num);
adapter->halmac_state.pwr_trk_state.seq_num = seq_num;
status = send_h2c_pkt_88xx(adapter, h2c_buf);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]send h2c pkt fail!!\n");
reset_ofld_feature_88xx(adapter, HALMAC_FEATURE_POWER_TRACKING);
return status;
}
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
enum halmac_ret_status
get_iqk_status_88xx(struct halmac_adapter *adapter,
enum halmac_cmd_process_status *proc_status)
{
*proc_status = adapter->halmac_state.iqk_state.proc_status;
return HALMAC_RET_SUCCESS;
}
enum halmac_ret_status
get_pwr_trk_status_88xx(struct halmac_adapter *adapter,
enum halmac_cmd_process_status *proc_status)
{
*proc_status = adapter->halmac_state.pwr_trk_state.proc_status;
return HALMAC_RET_SUCCESS;
}
enum halmac_ret_status
get_psd_status_88xx(struct halmac_adapter *adapter,
enum halmac_cmd_process_status *proc_status, u8 *data,
u32 *size)
{
struct halmac_psd_state *state = &adapter->halmac_state.psd_state;
*proc_status = state->proc_status;
if (!data)
return HALMAC_RET_NULL_POINTER;
if (!size)
return HALMAC_RET_NULL_POINTER;
if (*proc_status == HALMAC_CMD_PROCESS_DONE) {
if (*size < state->data_size) {
*size = state->data_size;
return HALMAC_RET_BUFFER_TOO_SMALL;
}
*size = state->data_size;
PLTFM_MEMCPY(data, state->data, *size);
}
return HALMAC_RET_SUCCESS;
}
/**
* psd_88xx() - trigger fw psd
* @adapter : the adapter of halmac
* @start_psd : start PSD
* @end_psd : end PSD
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
psd_88xx(struct halmac_adapter *adapter, u16 start_psd, u16 end_psd)
{
u8 h2c_buf[H2C_PKT_SIZE_88XX] = { 0 };
u16 seq_num = 0;
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
struct halmac_h2c_header_info hdr_info;
enum halmac_cmd_process_status *proc_status;
proc_status = &adapter->halmac_state.psd_state.proc_status;
if (halmac_fw_validate(adapter) != HALMAC_RET_SUCCESS)
return HALMAC_RET_NO_DLFW;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
if (*proc_status == HALMAC_CMD_PROCESS_SENDING) {
PLTFM_MSG_TRACE("[TRACE]Wait event(psd)\n");
return HALMAC_RET_BUSY_STATE;
}
if (adapter->halmac_state.psd_state.data) {
PLTFM_FREE(adapter->halmac_state.psd_state.data,
adapter->halmac_state.psd_state.data_size);
adapter->halmac_state.psd_state.data = (u8 *)NULL;
}
adapter->halmac_state.psd_state.data_size = 0;
adapter->halmac_state.psd_state.seg_size = 0;
*proc_status = HALMAC_CMD_PROCESS_SENDING;
PSD_SET_START_PSD(h2c_buf, start_psd);
PSD_SET_END_PSD(h2c_buf, end_psd);
hdr_info.sub_cmd_id = SUB_CMD_ID_PSD;
hdr_info.content_size = 4;
hdr_info.ack = 1;
set_h2c_pkt_hdr_88xx(adapter, h2c_buf, &hdr_info, &seq_num);
status = send_h2c_pkt_88xx(adapter, h2c_buf);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]send h2c pkt fail!!\n");
reset_ofld_feature_88xx(adapter, HALMAC_FEATURE_PSD);
return status;
}
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
enum halmac_ret_status
get_h2c_ack_iqk_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size)
{
u8 seq_num;
u8 fw_rc;
struct halmac_iqk_state *state = &adapter->halmac_state.iqk_state;
enum halmac_cmd_process_status proc_status;
seq_num = (u8)H2C_ACK_HDR_GET_H2C_SEQ(buf);
PLTFM_MSG_TRACE("[TRACE]Seq num : h2c->%d c2h->%d\n",
state->seq_num, seq_num);
if (seq_num != state->seq_num) {
PLTFM_MSG_ERR("[ERR]Seq num mismatch : h2c->%d c2h->%d\n",
state->seq_num, seq_num);
return HALMAC_RET_SUCCESS;
}
if (state->proc_status != HALMAC_CMD_PROCESS_SENDING) {
PLTFM_MSG_ERR("[ERR]not cmd sending\n");
return HALMAC_RET_SUCCESS;
}
fw_rc = (u8)H2C_ACK_HDR_GET_H2C_RETURN_CODE(buf);
state->fw_rc = fw_rc;
if ((enum halmac_h2c_return_code)fw_rc == HALMAC_H2C_RETURN_SUCCESS) {
proc_status = HALMAC_CMD_PROCESS_DONE;
state->proc_status = proc_status;
PLTFM_EVENT_SIG(HALMAC_FEATURE_IQK, proc_status, NULL, 0);
} else {
proc_status = HALMAC_CMD_PROCESS_ERROR;
state->proc_status = proc_status;
PLTFM_EVENT_SIG(HALMAC_FEATURE_IQK, proc_status, &fw_rc, 1);
}
return HALMAC_RET_SUCCESS;
}
enum halmac_ret_status
get_h2c_ack_pwr_trk_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size)
{
u8 seq_num;
u8 fw_rc;
struct halmac_pwr_tracking_state *state;
enum halmac_cmd_process_status proc_status;
state = &adapter->halmac_state.pwr_trk_state;
seq_num = (u8)H2C_ACK_HDR_GET_H2C_SEQ(buf);
PLTFM_MSG_TRACE("[TRACE]Seq num : h2c->%d c2h->%d\n",
state->seq_num, seq_num);
if (seq_num != state->seq_num) {
PLTFM_MSG_ERR("[ERR]Seq num mismatch : h2c->%d c2h->%d\n",
state->seq_num, seq_num);
return HALMAC_RET_SUCCESS;
}
if (state->proc_status != HALMAC_CMD_PROCESS_SENDING) {
PLTFM_MSG_ERR("[ERR]not cmd sending\n");
return HALMAC_RET_SUCCESS;
}
fw_rc = (u8)H2C_ACK_HDR_GET_H2C_RETURN_CODE(buf);
state->fw_rc = fw_rc;
if ((enum halmac_h2c_return_code)fw_rc == HALMAC_H2C_RETURN_SUCCESS) {
proc_status = HALMAC_CMD_PROCESS_DONE;
state->proc_status = proc_status;
PLTFM_EVENT_SIG(HALMAC_FEATURE_POWER_TRACKING, proc_status,
NULL, 0);
} else {
proc_status = HALMAC_CMD_PROCESS_ERROR;
state->proc_status = proc_status;
PLTFM_EVENT_SIG(HALMAC_FEATURE_POWER_TRACKING, proc_status,
&fw_rc, 1);
}
return HALMAC_RET_SUCCESS;
}
enum halmac_ret_status
get_psd_data_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size)
{
u8 seg_id;
u8 seg_size;
u8 seq_num;
u16 total_size;
enum halmac_cmd_process_status proc_status;
struct halmac_psd_state *state = &adapter->halmac_state.psd_state;
seq_num = (u8)PSD_DATA_GET_H2C_SEQ(buf);
PLTFM_MSG_TRACE("[TRACE]seq num : h2c->%d c2h->%d\n",
state->seq_num, seq_num);
if (seq_num != state->seq_num) {
PLTFM_MSG_ERR("[ERR]seq num mismatch : h2c->%d c2h->%d\n",
state->seq_num, seq_num);
return HALMAC_RET_SUCCESS;
}
if (state->proc_status != HALMAC_CMD_PROCESS_SENDING) {
PLTFM_MSG_ERR("[ERR]not cmd sending\n");
return HALMAC_RET_SUCCESS;
}
total_size = (u16)PSD_DATA_GET_TOTAL_SIZE(buf);
seg_id = (u8)PSD_DATA_GET_SEGMENT_ID(buf);
seg_size = (u8)PSD_DATA_GET_SEGMENT_SIZE(buf);
state->data_size = total_size;
if (!state->data)
state->data = (u8 *)PLTFM_MALLOC(state->data_size);
if (seg_id == 0)
state->seg_size = seg_size;
PLTFM_MEMCPY(state->data + seg_id * state->seg_size,
buf + C2H_DATA_OFFSET_88XX, seg_size);
if (PSD_DATA_GET_END_SEGMENT(buf) == 0)
return HALMAC_RET_SUCCESS;
proc_status = HALMAC_CMD_PROCESS_DONE;
state->proc_status = proc_status;
PLTFM_EVENT_SIG(HALMAC_FEATURE_PSD, proc_status, state->data,
state->data_size);
return HALMAC_RET_SUCCESS;
}
#endif /* HALMAC_88XX_SUPPORT */

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